JPS59174016A - クロツク分配システム - Google Patents
クロツク分配システムInfo
- Publication number
- JPS59174016A JPS59174016A JP58049277A JP4927783A JPS59174016A JP S59174016 A JPS59174016 A JP S59174016A JP 58049277 A JP58049277 A JP 58049277A JP 4927783 A JP4927783 A JP 4927783A JP S59174016 A JPS59174016 A JP S59174016A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- distributed
- free run
- stop signal
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58049277A JPS59174016A (ja) | 1983-03-24 | 1983-03-24 | クロツク分配システム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58049277A JPS59174016A (ja) | 1983-03-24 | 1983-03-24 | クロツク分配システム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59174016A true JPS59174016A (ja) | 1984-10-02 |
| JPH0418330B2 JPH0418330B2 (cs) | 1992-03-27 |
Family
ID=12826356
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58049277A Granted JPS59174016A (ja) | 1983-03-24 | 1983-03-24 | クロツク分配システム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59174016A (cs) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63203005A (ja) * | 1987-02-09 | 1988-08-22 | テラダイン・インコーポレーテッド | タイミング信号発生装置 |
| US4847516A (en) * | 1986-11-26 | 1989-07-11 | Hitachi, Ltd. | System for feeding clock signals |
-
1983
- 1983-03-24 JP JP58049277A patent/JPS59174016A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4847516A (en) * | 1986-11-26 | 1989-07-11 | Hitachi, Ltd. | System for feeding clock signals |
| JPS63203005A (ja) * | 1987-02-09 | 1988-08-22 | テラダイン・インコーポレーテッド | タイミング信号発生装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0418330B2 (cs) | 1992-03-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5450458A (en) | Method and apparatus for phase-aligned multiple frequency synthesizer with synchronization window decoder | |
| US5268656A (en) | Programmable clock skew adjustment circuit | |
| US5077686A (en) | Clock generator for a computer system | |
| US6687320B1 (en) | Phase lock loop (PLL) clock generator with programmable skew and frequency | |
| US5317601A (en) | Clock distribution system for an integrated circuit device | |
| JPH05233275A (ja) | マイクロプロセッサ | |
| US5691660A (en) | Clock synchronization scheme for fractional multiplication systems | |
| EP0291335B1 (en) | Generating clock pulses | |
| EP0616278B1 (en) | Synchronous gated clock generator | |
| US5742799A (en) | Method and apparatus for synchronizing multiple clocks | |
| JPS59174016A (ja) | クロツク分配システム | |
| JP2776925B2 (ja) | クロック信号供給装置及び電子計算機 | |
| JP2653281B2 (ja) | 多相クロック制御回路 | |
| EP1697821B1 (en) | Integrated circuit clock distribution | |
| JPH088701A (ja) | クロック配給装置 | |
| JP2978884B1 (ja) | クロック交絡分配装置 | |
| JPH0145800B2 (cs) | ||
| JPH04251312A (ja) | クロツク供給方式 | |
| JPH0293810A (ja) | 信号発生方式 | |
| JPH01189220A (ja) | クロック切替方式 | |
| JP2918943B2 (ja) | 位相同期回路 | |
| JPS62191910A (ja) | クロツク制御方式 | |
| JPS60146315A (ja) | クロツク信号発生方式 | |
| JP2533371Y2 (ja) | 多相クロック発生回路 | |
| JPS62169560A (ja) | 二重化クロツク信号発生装置 |