JPS5917227A - Method of producing composite laminated ceramic part - Google Patents

Method of producing composite laminated ceramic part

Info

Publication number
JPS5917227A
JPS5917227A JP57126179A JP12617982A JPS5917227A JP S5917227 A JPS5917227 A JP S5917227A JP 57126179 A JP57126179 A JP 57126179A JP 12617982 A JP12617982 A JP 12617982A JP S5917227 A JPS5917227 A JP S5917227A
Authority
JP
Japan
Prior art keywords
conductor
sheet
insulator
layer
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57126179A
Other languages
Japanese (ja)
Other versions
JPH0155594B2 (en
Inventor
嶋田 勇三
和明 内海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57126179A priority Critical patent/JPS5917227A/en
Publication of JPS5917227A publication Critical patent/JPS5917227A/en
Publication of JPH0155594B2 publication Critical patent/JPH0155594B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Laminated Bodies (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、コンデンサを構成し7た複合セラミ。[Detailed description of the invention] The present invention is a composite ceramic that constitutes a capacitor.

り部品の製造方法に関する。This invention relates to a method for manufacturing parts.

従来コンデンサは配線層を設けたセラミック等の基板上
に、配線導体間に配置して半田イ4けなとして電子回路
を形成していた。しかし、この方法では、チップ型また
は、円板型のコンデンサd、それぞれ1藺づつ取付けら
れねばならない。一方点年、ハイ7リツド技術によりコ
ンデンサ等を含む電子回路を基板内部に形成することが
試みられている。すなわち、アルミナ等のセラミック基
板にスクリーン印刷法により誘電体層とコンデンサ用内
部電樹とを交互に形成し、次いでその上に基板表面とな
る絶縁層を形成して焼成し、コンデンサを構成している
つしかしこの場合、各パターンを印刷する工程が多くな
り作業性が悪くなる欠点があった。またg電体材料の誘
電率が小さいこと、さら圧印刷積層をくり返すに従い印
刷部の平面性が非常に悪くなり積層数を増やすことが困
難であることと罠より大きな容量をもつコンデンサを形
成することは不可能であった。一方、アルミナクリーン
シートを用いて基板内部にコンデンサを形成する方法も
行なわれている。第1図は、この方法により形成された
コンデンサを含んだ基板の模式的断面図である。アルミ
ナグリーンシート上に;コンデンサ用内部電極層を形成
するようにスラリ−7印11i11 L、該電極層を設
けたアルミナクリーンシート3と、必要に応じC1ツみ
をもだせるだめのアルミナグリーンシート1とを複数枚
積層し1500〜1600℃ の両温でしかも還元雰囲
気で焼成されコンデンサ4を構成したセラミック複合部
品が得られた。この方法の場合、アルミナ材料を焼成す
るために1500〜1600℃という高温が必要である
ことから導体材料として必然的にW 、 Mo等の商融
点金属を用いなげればならず−これらの金属の酸化防止
のだめに還元雰囲気で焼成するため、燃料費・雰囲気作
成等のコストが面くなり、装置も犬がかりケ(なる欠点
があった。また、アルミナの誘電率は約9程度であるこ
とから、このフンテンづ−の容量も小さなものとなって
しまう欠点があった。さらに、該複合セラミック部品の
外部への引出端子部をホンディング性を良好にするため
に、A、、Ag 等の責金島メッキをする必要があり、
1程的に多くなる、とともにメッキ液などによる腐食や
マイグレーション等圧よって部品の信頼性がそこなわれ
る危険があった。
Conventionally, capacitors are placed on a substrate made of ceramic or the like with a wiring layer between wiring conductors, and an electronic circuit is formed using four solder wires. However, in this method, one chip type or disk type capacitor d must be installed. On the other hand, in recent years, attempts have been made to form electronic circuits including capacitors and the like inside substrates using high-7-lid technology. That is, a dielectric layer and an internal electric tree for a capacitor are alternately formed on a ceramic substrate made of alumina or the like by a screen printing method, and then an insulating layer that becomes the surface of the substrate is formed and fired to form a capacitor. However, in this case, there is a drawback that the number of steps for printing each pattern increases, resulting in poor workability. In addition, the dielectric constant of the g-electric material is small, and the flatness of the printed area deteriorates as the pressure printing layering is repeated, making it difficult to increase the number of layers, and forming a capacitor with a larger capacity than a trap. It was impossible to do so. On the other hand, there is also a method of forming a capacitor inside a substrate using an alumina clean sheet. FIG. 1 is a schematic cross-sectional view of a substrate containing a capacitor formed by this method. On the alumina green sheet; slurry 7 mark 11i11 L to form the internal electrode layer for the capacitor, the alumina clean sheet 3 on which the electrode layer is provided, and the alumina green sheet 1 on which C1 thickness can be applied if necessary. A ceramic composite component, which constituted the capacitor 4, was obtained by laminating a plurality of layers and firing at both temperatures of 1,500 to 1,600 DEG C. and in a reducing atmosphere. In this method, a high temperature of 1,500 to 1,600°C is required to sinter the alumina material, so it is necessary to use commercial melting point metals such as W and Mo as conductor materials. Because firing is carried out in a reducing atmosphere to prevent oxidation, costs such as fuel and atmosphere creation are high, and the equipment is also expensive.Also, since the dielectric constant of alumina is approximately 9, However, there was a drawback that the capacitance of this mount was also small.Furthermore, in order to improve the bonding property of the external lead terminal part of the composite ceramic component, the responsibility of A, Ag, etc. was required. Needs to be gold-plated,
There was a risk that the reliability of the parts would be impaired due to corrosion caused by the plating solution and migration pressure.

本発明の目的は、このようム従来の欠点を除去せしめ、
従来よりも低温(130’0℃以丁)でしかも酸化性雰
囲気で焼成可能な局誘電率をもつ誘電体材料および絶縁
体材料を用いることによりAu。
The object of the present invention is to eliminate such drawbacks of the prior art and to
Au by using a dielectric material and an insulator material that have a local dielectric constant that allows firing at a lower temperature (130'0° C. or lower) than in the past and in an oxidizing atmosphere.

Ag、Ps、Pd  等およびこれらを1以」−含んだ
合金が使用oJ能となり、通常のクリーンシー)1用い
る多層セラミック基鈑を作製する手法で作業性の良い、
平面性も良好で、しかも同時焼成でき、また該焼成工程
のみて′ハンダ付等のホンティング性も良好な新規な大
容量をもつコンデンサ複合積層セラミ、り部品の製造方
法を提供することにある。
Ag, Ps, Pd, etc. and alloys containing one or more of these can be used, and the method of producing a multilayer ceramic substrate using ordinary clean sea) 1 has good workability.
An object of the present invention is to provide a method for producing a new large-capacity capacitor composite laminated ceramic component that has good flatness, can be fired simultaneously, and has good soldering and other soldering properties through the firing process. .

本発明は誘電体グリーンシートと絶縁体グリーンシート
を作製する工程、誘電体クリーンシートと絶縁体グリー
ンシートにスルーポールを形成スる工程、誘電体グリー
ンシートの表面及びスルーホールに導体を形成する工程
、絶縁体グリーンシートの表面又は/及びスルーホール
に導体を形成する工程、導体が形成されない絶縁体クリ
ーンシートと導体が形成された絶縁体クリーンシート及
び誘電体グリーンシートとを一体に成型し、焼成する工
程を有することを特徴とする複合積層セラミック部品の
製造方法である。
The present invention is a process of producing a dielectric green sheet and an insulator green sheet, a process of forming through poles on a dielectric clean sheet and an insulator green sheet, and a process of forming conductors on the surface of the dielectric green sheet and through holes. , a step of forming a conductor on the surface of the insulator green sheet and/or through holes, a step of integrally molding the insulator clean sheet on which no conductor is formed, the insulator clean sheet and the dielectric green sheet on which the conductor is formed, and firing. This is a method for manufacturing a composite laminated ceramic component, comprising the steps of:

以下本発明を実施例に基づいて詳細に説明する。The present invention will be described in detail below based on examples.

第2図〜第9図は本発明の製造方法を示す図であり第1
θ図は実施例において作製した本発明の複合積層セラミ
、り部品の模式的断面図である。
Figures 2 to 9 are diagrams showing the manufacturing method of the present invention.
The θ diagram is a schematic cross-sectional view of a composite laminated ceramic component of the present invention produced in an example.

第2図に示す絶縁体グリーンシー)11は酸化アルミニ
ウムを40〜60wt%、酸化鉛を1〜40wt%、酸
化ケイ素を2〜40 wt%、酸化ホウ素を1〜30 
w*%、■族元素酸化物を0.05〜25wt%、■族
元素(ただし炭素、ケイ素、鉛は除く)の酸化物を0.
01−10 wt%、で合計100wt% となるよう
な組成の900℃程度で焼結できる無機粉末をエチルセ
ルツル7等の有機溶媒、可塑剤、およびバインダーとし
てPVBと共に混合しスラリー状にした後キャスティン
グ製膜し60闘×40龍、厚み1100pのシートにパ
ンチングして作製した。一方第3図に示す誘電体グリー
ン−7−)12は、Pb(Fe% ・W5A)6.ss
(”6%・Nb外)0.11701  を組成とする9
00℃程度で焼結tr、−=きる複合ペロブスカイト系
高誘電体材料を、予焼、ボールミル粉砕後、絶縁体グリ
ーンシートを作製したときと同様の有機溶媒・可塑剤お
よびバインダーとによりスラリー状にし、キャスティン
グ製膜したのち60giX40mmの大きさに打抜いて
作製した。
Insulator Green Sea) 11 shown in Figure 2 contains 40 to 60 wt% aluminum oxide, 1 to 40 wt% lead oxide, 2 to 40 wt% silicon oxide, and 1 to 30 wt% boron oxide.
w*%, 0.05 to 25 wt% of oxides of group ■ elements, and 0.05 to 25 wt% of oxides of group ■ elements (excluding carbon, silicon, and lead).
01-10 wt%, and a total of 100 wt%, inorganic powder that can be sintered at about 900°C is mixed with PVB as an organic solvent such as ethyl seltzer 7, a plasticizer, and a binder to form a slurry, and then cast. It was produced by punching a sheet of 60 sheets x 40 sheets and a thickness of 1100 sheets. On the other hand, the dielectric green-7-) 12 shown in FIG. 3 is Pb(Fe%.W5A)6. ss
(6% Nb excluded) 9 with a composition of 0.11701
The composite perovskite-based high dielectric material, which can be sintered at about 00°C, is pre-fired and ball-milled, and then made into a slurry with the same organic solvent, plasticizer, and binder used to make the insulating green sheet. After forming a film by casting, it was punched out into a size of 60 gi x 40 mm.

ここで用いた絶縁体および島誘電体椙料は、それぞれ同
一の非常に低温度(900℃)で焼結可能であることか
ら同時焼成ができる。またこれらの祠料を用いることに
より融点の低い金、銀、白金、パラジウム等およびこれ
らを1以上名む合金を導体として使用できるため酸化性
雰囲気で焼成が行なえる。
The insulator and dielectric materials used here can be sintered at the same very low temperature (900° C.), so they can be fired simultaneously. Furthermore, by using these abrasive materials, it is possible to use gold, silver, platinum, palladium, etc., which have low melting points, and alloys containing one or more of these as conductors, so that firing can be performed in an oxidizing atmosphere.

次にコンデンサ用内部電極のうち一力の最端部を設ける
だめ第4図に示すように絶縁体クリーンシート11上に
スクリーン印刷法により銀−バランラム系導体を印刷1
.内部!極層13を形成した。
Next, in order to provide the outermost end of the internal electrode for the capacitor, a silver-balanum conductor is printed 1 on the insulator clean sheet 11 by screen printing, as shown in FIG.
.. internal! A pole layer 13 was formed.

第5図の工程では、誘電体グリーンシート12にコンデ
ンサ用内部電◆を接続するだめのスルーホール14を形
成した。第6図の工程において、第5図のスルーホール
形成された誘電体グリーンシートにコンデンサ用内部電
極を第4図の導体パターンに対して線対称になるように
銀−バランラム系導体層を印刷すると同時に1層からの
対向電極用導体との接続をもたせるためにンンド状導体
層16を印刷した。このとき誘電体クリーンシートに設
けたスルーホール中に完全に導体が埋まることになる。
In the step shown in FIG. 5, a through hole 14 was formed in the dielectric green sheet 12 to connect the internal capacitor ◆. In the process shown in Fig. 6, a silver-balanram conductor layer is printed on the dielectric green sheet in which the through holes shown in Fig. 5 are formed so that the internal electrodes for the capacitor are symmetrical with respect to the conductor pattern shown in Fig. 4. At the same time, a strand-like conductor layer 16 was printed in order to connect with the counter electrode conductor from the first layer. At this time, the conductor is completely buried in the through holes provided in the dielectric clean sheet.

第7図の工程VC,進吟進用スルーホールの形成された
誘電体クリーンシート12上に第4図と同様な電極N4
13を印刷するとh1ホlに、第6図の′に極層J5と
導通をもたせるためにランド状導体層17を印刷した。
In step VC of FIG. 7, an electrode N4 similar to that shown in FIG.
After printing 13, a land-like conductor layer 17 was printed on the h1 hole in order to establish conduction with the pole layer J5 at '' in FIG.

第8図の工程では、基板内部に構成するコンデンサの対
向電極ヲそれぞれ基板最上層−へ引きまわすだめの導体
パターンを印刷するだめの−L程であり、第5図と同様
なヌル−ホールパターン14を形成した絶縁体グリーン
シー)11上に、コンデンザ内部!極のうち一方の電極
層13と導通をもたせるだめの電極層パターンI8、お
よびもう一方の電極層15と導通をもたせるだめの電極
層パターン19を印刷した。′第9図は、外部への引出
端子部を設()た基板最−[を形成するだめの工程であ
り、幼子部の位置に合ったスルーホール14を設けた絶
縁体グリーンシー4ii上に引出端子部の導体N20全
印刷した。
In the process shown in Fig. 8, conductor patterns are printed to route the opposing electrodes of the capacitors inside the board to the top layer of the board, respectively, and the null-hole pattern similar to that shown in Fig. 5 is printed. Insulator Green Sea that formed 14) on top of 11, inside the capacitor! An additional electrode layer pattern I8 that provides electrical continuity with one electrode layer 13 of the poles, and an additional electrode layer pattern 19 that provides electrical continuity with the other electrode layer 15 were printed. 'Figure 9 shows the final step of forming the board with the external lead terminal part (), and the insulator green sheet 4ii is formed with a through hole 14 corresponding to the position of the child part. The entire conductor N20 of the lead-out terminal part was printed.

以上おのおの別々に作製した各層パターンのシートを積
層熱圧着し/こときの積層構造は第1θ図に示す。基板
岐下層から絶縁体グリーンシート11を4枚重ね、次に
第4図の電極層13f!:設げた絶縁体シート、餓6図
の印刷諷電体グリーンシート、第7図の印刷誘電体グリ
ーンシート、第6図の印刷訊電体クリーンシート、第8
図の引回し導体パターン印刷絶縁体グリーンシート、お
よび〜最上層の引出端子部を設えた絶縁体クリーンシー
トを屯ね合せ熱フレスで全圧6tonで30分間加圧し
て、vgm体、及び絶縁体グリーンシートおよび電#層
を一体化した。
The sheets of each layer pattern prepared separately above were laminated and thermocompressed, and the laminated structure is shown in Fig. 1θ. Layer four insulator green sheets 11 starting from the lower layer of the substrate, and then the electrode layer 13f in FIG. 4! : installed insulator sheet, printed electroconductor green sheet as shown in Figure 6, printed dielectric green sheet as shown in Fig. 7, printed electroconductor clean sheet as shown in Fig. 8
The insulator green sheet printed with the wiring conductor pattern shown in the figure and the insulator clean sheet with the top layer lead-out terminal section are stacked together and pressurized with a heat press at a total pressure of 6 tons for 30 minutes to form a VGM body and an insulator. The green sheet and the electrical layer are integrated.

続いて、積層体は、焼成炉(図小せす)シ(より、90
0℃の温度′t″酸化性算囲気中で焼成した。
Subsequently, the laminate was heated in a firing furnace (Fig.
It was fired in an oxidizing atmosphere at a temperature of 0° C. 't''.

焼成後の作製基板中には、誘電体層を3層構成をれだコ
ンデンサをもつ構造になっている。このようにして作f
JAl−だコンデンサ複合積層セラミ。
The fabricated substrate after firing has a structure with a three-layer dielectric layer and a capacitor. In this way,
JAl-da capacitor composite laminated ceramic.

り部品のコンテンサ部は、4nF〜4μFとい5大容y
T′j:を示した。
The capacitor part of the component is 4nF to 4μF.
T′j: was shown.

以上の如く、本発明のコンデンサ複合積層セラミ、り部
品の製造方法を用いることにより、篩誘を率をもつ誘電
体羽村および絶縁体羽村を同一にしかも低い温度で焼成
して、画期的な大容量のコンデンサを内蔵した基板を作
成することが出来るようになり、電子部品の複合小型化
や信頼性・作業性が非常に向上したうさらK、この方法
により。
As described above, by using the manufacturing method of capacitor composite laminated ceramic parts of the present invention, the dielectric material and the insulating material having the same sieve conductivity can be fired at the same temperature and at a low temperature, resulting in an innovative This method has made it possible to create circuit boards with built-in large capacity capacitors, and has greatly improved the miniaturization of electronic components and their reliability and workability.

融点の低い篩導電率でボンゲインク性の商い金属を導体
として使用でき酸化性雰囲気で焼成oJ能となった。
A bonding metal with a low melting point and sieve conductivity can be used as a conductor and can be fired in an oxidizing atmosphere.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来のアルミカブリーンシート法を用いたフ
ンデンザ複合基板の構造を示しだ断面図であり、第2図
ないし第9図は、本発明の製造工程を示す平面図であり
、第10図は、本発明の製造方法により作製した複合部
品の模式的断面図である。 図において。 1、・・・アルミナシート、2・・・導体層、3・・・
詩N体層として利用したアルミ力シート、4・・・コン
デ/す部、11・・・絶縁体グリーンシート、+2−4
1電体グリーンシー)、13・・コンデンサ川内tfl
t電極、14・・スルーポール、15・・・フンデンザ
用内部対向電檎、16.17・・・上下導通のだめの導
体層、18.19・・・導体配線層、20・・・外部引
出端子用導体層。 牙 l 圏 第2口     、2!730 對 4 μs オクロ オq圓
FIG. 1 is a sectional view showing the structure of a Fundenza composite substrate using the conventional aluminum cablean sheet method, and FIGS. 2 to 9 are plan views showing the manufacturing process of the present invention. FIG. 10 is a schematic cross-sectional view of a composite component manufactured by the manufacturing method of the present invention. In fig. 1,...Alumina sheet, 2...Conductor layer, 3...
Aluminum force sheet used as a poem N body layer, 4... Conde/su part, 11... Insulator green sheet, +2-4
1 electric body green sea), 13... capacitor Kawauchi tfl
T-electrode, 14...Through pole, 15...Internal opposing electrode for fundenza, 16.17...Conductor layer for top and bottom conduction, 18.19...Conductor wiring layer, 20...External lead-out terminal conductor layer. Fang l Circle 2nd mouth, 2!730 對 4 μs Okurooqen

Claims (1)

【特許請求の範囲】[Claims] 誘電体クリーンシートと絶縁体クリーンシートを作製す
る工程、誘電体クリーンシートと絶縁体グリーンシート
にスルーホールを形成する工程、ti電体グリーンシー
トの表面及びスルーホールに導体を形成する工程、絶縁
体クリーンシートの表面又は/及びスルーホールに導体
を形成する−[程、導体が形成されない絶縁体グリーン
シートと導体が形成された絶縁体グリーンシート及び誘
電体クリーンシートとを一体に成型(1、焼成する[程
を有することを特徴とする複合ff1llセラミ、り部
品の製造方法。
A process of producing a dielectric clean sheet and an insulator clean sheet, a process of forming through holes in the dielectric clean sheet and an insulator green sheet, a process of forming a conductor on the surface of the Ti electric green sheet and the through holes, an insulator Forming a conductor on the surface of the clean sheet and/or through-holes - Molding the insulator green sheet on which no conductor is formed, the insulator green sheet on which the conductor is formed, and the dielectric clean sheet together (1. Baking) A method for manufacturing a composite ff1ll ceramic component characterized by having a certain degree.
JP57126179A 1982-07-20 1982-07-20 Method of producing composite laminated ceramic part Granted JPS5917227A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57126179A JPS5917227A (en) 1982-07-20 1982-07-20 Method of producing composite laminated ceramic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57126179A JPS5917227A (en) 1982-07-20 1982-07-20 Method of producing composite laminated ceramic part

Publications (2)

Publication Number Publication Date
JPS5917227A true JPS5917227A (en) 1984-01-28
JPH0155594B2 JPH0155594B2 (en) 1989-11-27

Family

ID=14928636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57126179A Granted JPS5917227A (en) 1982-07-20 1982-07-20 Method of producing composite laminated ceramic part

Country Status (1)

Country Link
JP (1) JPS5917227A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60177695A (en) * 1984-02-23 1985-09-11 日本電気株式会社 Composite ceramic board
JPS6416670U (en) * 1987-07-21 1989-01-27
JPH01321695A (en) * 1988-06-23 1989-12-27 Mitsubishi Mining & Cement Co Ltd Ceramic composite circuit substrate
JPH02178994A (en) * 1988-12-29 1990-07-11 Narumi China Corp Laminated circuit ceramic board
JP2001332440A (en) * 2000-05-22 2001-11-30 Rohm Co Ltd Method of manufacturing laminated electronic component
JP2011066439A (en) * 2003-03-27 2011-03-31 Epcos Ag Electric multilayer component

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60177695A (en) * 1984-02-23 1985-09-11 日本電気株式会社 Composite ceramic board
JPS6416670U (en) * 1987-07-21 1989-01-27
JPH01321695A (en) * 1988-06-23 1989-12-27 Mitsubishi Mining & Cement Co Ltd Ceramic composite circuit substrate
JPH02178994A (en) * 1988-12-29 1990-07-11 Narumi China Corp Laminated circuit ceramic board
JP2001332440A (en) * 2000-05-22 2001-11-30 Rohm Co Ltd Method of manufacturing laminated electronic component
JP2011066439A (en) * 2003-03-27 2011-03-31 Epcos Ag Electric multilayer component

Also Published As

Publication number Publication date
JPH0155594B2 (en) 1989-11-27

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