JPS59161837A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To suppress the generation of bird's beaks and to reduce an element isolating area as well as to lessen crystal defects to generate on a substrate by a method wherein when an oxide film to be used as the element isolating area is formed, a thick polycrystalline Si layer with the surface and side surfaces, which have been covered with a thin Si3N4 film, is used as the mask to be used at the time of performing a thermal oxidation on the Si substrate. CONSTITUTION:A thin SiO2 film 2 is coated on the surface of a P type Si substrate 1 and a thick polycrystalline Si layer 10 in a prescribed form is provided on the central part of the surface of the film 2. A thermal treatment is performed in the NH3 atmosphere for growing a thin Si3N4 film 11 on the whole surface. The film 11 is made to remain only on the surface and side surfaces of the layer 10 and the rest of it is removed by performing an etching. Then, P type impurity ions are implanted for forming P type channel stopper regions 4 and thick insulating isolation films 5 underlaid with the regions 4 are grown by performing a thermal treatment. After that, the film 11, the layer 10 and the film 2 are removed in sequence order, a gate oxide film 13 is formed on an element forming region 12, a polycrystalline Si gate electrode 14 is provided on the above and N type source-drain regions 15 and 16 are formed in the substrate 1 on both sides of the electrode 14 by using the electrode 14 as the mask.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device.
The present invention relates to a method for manufacturing a semiconductor device in which the element isolation region in I is reduced and the quality is improved.

In recent years, as the density of semiconductor integrated circuits has increased, it has become necessary to reduce the isolation regions between elements.

When semiconductor elements are formed on a silicon substrate, an oxide film formed by selective oxidation is generally used for element isolation.

First, the process of separating elements of a conventional semiconductor integrated circuit will be explained with reference to FIG.

A thin oxide film 2 is formed by thermal oxidation on a P-type silicon substrate 1 shown in FIG. 1(5). Next, a nitride film 3 is formed to a thickness of 100 to 1200 mm by, for example, the CVD method, and then selectively etched to form a nitride film pattern [first
Figure (B)]. Next, for example, boron (B) is ion-implanted to form an implanted region (channel stopper region) 4.
FIG. 1 (C1) Next, the silicon substrate 1 is thermally oxidized using the nitride film 3 as a mask to form an insulating isolation oxide film 5 having a thickness of, for example, 1 μm [FIG. 1 (D)].

This insulating isolation oxide film 5 forms an element isolation region 6, and the lower part of the nitride film 3 becomes an element formation region 7.

In this way, the system formation region 7 is separated, but when the silicon substrate is heated and oxidized, the portions in contact with both ends of the nitride film 3 are oxidized into elongated strips, forming so-called "knob's beaks 8". 7 is narrowed, and crystal defects are generated in the silicon substrate below the bird's beak 8, resulting in an increase in leakage current of the device.

Bird's beak outbreak is mainly due to virtue as a mask++j4
This occurs when 3 is thin and oxide 1 and 2 below it are thick. On the other hand, crystal defects are caused by stress caused by a difference in thermal expansion between the nitride film 3 and the silicon substrate 1. Therefore, in order to suppress the formation of bird's beak, the nitride film 3 should be made thicker.
Although it is necessary to make the oxide film 2 thinner, this will conversely increase crystal defects.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates the above-mentioned drawbacks, suppresses the formation of bird's beaks, reduces the size of element isolation regions, and reduces crystal defects occurring in a silicon substrate.

Another object of the present invention is to provide a method for manufacturing a semiconductor device with improved convergence by forming gate electrodes using a self-line method.

A feature of the invention is that when an oxide film is formed on a semiconductor substrate, a step of selectively forming a polycrystalline silicon layer on the oxide film in a region where a circuit element is to be formed; The method of manufacturing a semiconductor device includes the steps of: covering the upper surface with an oxidation-resistant film; and performing selective oxidation using the polycrystalline silicon layer covered with the oxidation-resistant film as a mask.

Other features of the present invention include a step of providing an oxide film on a semiconductor substrate and selectively forming a polycrystalline silicon layer on the oxide film in a region where a circuit element is to be formed; and a step of covering the upper surface with an oxidation-resistant film, a step of performing selective oxidation using the polycrystalline silicon layer covered with the oxidation-resistant film as a mask, and etching the polycrystalline silicon layer into a predetermined shape. A method of manufacturing a semiconductor device includes a step of forming a gate electrode.

unexploded【! According to No. 11, thick polycrystalline silicon (hereinafter referred to as polysilicon) whose side surfaces and top surface are covered with a thin silicon nitride film is used as a mask when thermally oxidizing a silicon substrate to form an oxide film as an element isolation region. ) layer, the polysilicon layer is formed thickly, so the growth of Tsukuzu peak is suppressed, and the thermal expansion coefficients of the polysilicon layer and silicon substrate are almost equal. No crystal defects occur due to this. Furthermore, when the gate electrode is formed by etching this polysilicon layer, the mask alignment margin for forming a new gate electrode is left unreliable, so that a semiconductor device with an improved degree of integration can be manufactured.

Next, the present invention will be explained in detail using examples.

FIGS. 2(8) to 2(0) are manufacturing process cross-sectional views for explaining the first embodiment of the present invention.

In FIG. 2(5), a thin oxide film 2 is formed on the surface of the P-type silicon substrate 10 by thermal oxidation. Next, polysilicon layer 10 is grown by, for example, the CVD method, and then selectively etched into a predetermined shape.

Note that when the polysilicon layer 10 is used as a gate electrode as in the second embodiment, phosphorus (P) is diffused before etching to lower the resistance of the polysilicon layer.

Next, for example, about 1
After growing a silicon nitride film 11 of 0 OA to cover the side surfaces and top surface of the polysilicon layer 10, the polysilicon layer 1 is grown.
The silicon nitride film 11 other than the area around 0 is removed by etching. Next, boron (B) ions are implanted into the entire surface to form an implanted region (channel stopper region) 4 [FIG. 2(B)].

Next, the silicon substrate 1 is thermally oxidized to grow an insulating isolation oxide film 5 [FIG. 2(C)].

Next, after sequentially removing the silicon nitride film 11, the polysilicon layer 10, and the oxide film 2, a gate oxide film 13 is formed on the element formation region 12 [FIG. 2 (to)].

Next, after growing a polysilicon layer on the surface of the silicon substrate 1, it is etched into a predetermined pattern to form a gate electrode 1.
form 4. Next, for example, arsenic (As) is ion-implanted to form a source region 15 and a drain region 16.
Figure 2 (E)].

Next, an insulating oxide film 17 is formed by the CVD method, and then openings are formed on the source region 14 and drain region 16. Next, aluminum (A/) is deposited and etched to form an Al electrode wiring 18. Then, the MO8 semiconductor device was completed (Fig. 2(F)).

In this way, a bird's beak as shown in FIG. 1(D) is not formed in the isolation oxide film 5 formed using the thick polysilicon layer 10 covered with the thin silicon nitride film 11 as a mask. Therefore, the element isolation region formed by the insulating isolation oxide film 5 can be made small and have the minimum required p, and the degree of integration of the semiconductor device can be extremely high. Furthermore, crystal defects that conventionally occur in the element formation region are also suppressed, and a semiconductor device with improved quality and less leakage current can be obtained.

FIGS. 3(5) to (5) are sectional views showing the manufacturing process of a 70-teing gate type EPf'LOM as a second embodiment of the present invention.

FIG. 3(5) is almost the same as FIG. 2(Q). In other words, by the same process as FIG. A first polysilicon layer 20 covered with a silicon nitride film with P diffused through the
After forming an implanted region 4 by ion-implanting B, an insulating isolation oxide film 5 is formed by thermal oxidation. In this case, the thin oxide film 2 becomes a gate oxide film.

Next, after forming a second polysilicon layer and a photoresist layer on the bottom surface of the silicon substrate 1, the photoresist layer is etched into a predetermined pattern 21, and this photoresist pattern 21 is used as a mask to form a second polysilicon layer. Etching is performed to form the second gate electrode 22 [FIG. 3(B)].

Next, using the second gate electrode 22 and the pattern 21 of the photoresist layer as a mask, the silicon nitride film 11 and the first polysilicon layer 20 are sequentially etched, and the first gate (floating gate) electrode 2 is etched using a self-line method.
0' is formed. Next, As is ion-implanted to form a source region 15 and a drain region 16 [FIG. 3 (C1
).

Note that in this step, a portion of the silicon nitride film may be removed and a new oxide film or the like may be formed to serve as an insulating film between the first and second gate electrodes.

Next, after removing the photoresist pattern 21, an insulating oxide film 17 is formed over the entire surface, and openings are provided above the source region 15 and drain region 16.

Next, after depositing AI on the entire surface, selective etching is performed, and A
A floating gate type BF is formed by forming the A electrode wiring 18.
Complete the ROM [Figure 3 (IN).

In the floating gate type EP OM formed in this way, as in the case of the first embodiment, the element isolation region becomes smaller because no bird's beak is formed, and the degree of integration is improved accordingly. The occurrence of crystal defects is also suppressed. Furthermore, since the first gate electrode is formed by a self-line method, the degree of integration can be further improved. Next, its structure will be explained.

Figure 4 is a partial cutaway top view of Figure 3 (Q) and Figure 5.
The figure is a top view of the same part as FIG. 4 in a conventional 70-gate mEP OM.

4 and 5, in the conventional floating gate type EPROM, a first
The first gate electrode 3 formed through the gate oxide film of
0 (shaded area) is formed to protrude from the element formation region 12 by ΔW in consideration of mask alignment accuracy. That is,
Considering the etching margin a (L=tΔW'=i3 μm), the interval between the element formation regions is about 9 μm.

On the other hand, since the first gate electrode 20' of the floating gate type BFROM manufactured by the method of the present invention is formed by the self-line method, the element formation region spacing is only 3 μm of the etching margin a, and the element formation The region spacing is reduced to 1/3, and the degree of integration is improved accordingly.

In the second embodiment, the floating gate type EPR
Although the explanation was made using OM, the invention is not limited to this, and it is also possible to use the polysilicon layer used as a mask when forming an insulating isolation oxide film as the gate electrode of a normal rVi08 semiconductor. In this case, the same effect as above is obtained.

As described in detail above, according to the present invention, the growth of bird's beaks is suppressed, and crystal defects occurring in the element formation region are also suppressed, so a method for manufacturing a high-quality semiconductor device with an improved degree of integration is achieved. The effect is dog because it gives.

[Brief explanation of the drawing]

FIGS. 1(5) to (5) are manufacturing process cross-sectional views for explaining a conventional method of manufacturing a semiconductor device, and FIGS. 2(A) to (F') are cross-sectional views for explaining a first embodiment of the present invention. Manufacturing process sectional view, Figure 3 (8) - (Koji is a manufacturing process sectional view for explaining the second embodiment of the present invention, Figure 4 is a partially cutaway top view of Figure 3 (C) , FIG. 5 is a partially cutaway top view of a conventional 70-type EP OM. 1... P-type silicon substrate, 2... oxide film, 3... ... Nitride film, 4 ... Injection region, 5 ... Insulating isolation oxide film, 6 ... Element isolation region, 7 ... Element formation Area, 8...
・Bird's beak, 10...Polysilicon layer, 1
1...Silicon nitride film, 12...Element formation region, 13...Gate oxide film, 14...
... Gate electrode, 15 ... Source region, 16
...Drain region, 17...Insulating oxide film, 18...A! ! Electrode wiring, 20...
-Polysilicon layer, 20'...First gate electrode, 21...Photoresist layer pattern, 22
...Second gate electrode, 30...First
gate electrode. Sensei 1 Gokaya 2 Tagawa 30 tk, 6! - Hand figure 20' treatment 5 times

Claims (2)

[Claims] (1) A step of providing an oxide film on a semiconductor substrate, selectively forming a polycrystalline silicon layer on the oxide film in a region where a circuit element is to be formed, and making the side and top surface of the polycrystalline silicon layer acid-resistant. 1. A method of manufacturing a semiconductor device, comprising the steps of: covering with an oxidation-resistant film; and performing selective oxidation using the polycrystalline silicon layer covered with the oxidation-resistant film as a mask. (2) A step of providing an oxide film on a semiconductor substrate, selectively forming a polycrystalline silicon layer on the oxide film in a region where a circuit element is to be formed, and making the side and top surface of the polycrystalline silicon layer resistant to acid. a step of selectively oxidizing the polycrystalline silicon layer using the polycrystalline silicon layer covered with the oxidation-resistant film as a mask, and etching the polycrystalline silicon layer into a predetermined shape to form a gate electrode. A method for manufacturing a semiconductor device, comprising the steps of: