JPS59145564A - 半導体集積装置 - Google Patents

半導体集積装置

Info

Publication number
JPS59145564A
JPS59145564A JP58020044A JP2004483A JPS59145564A JP S59145564 A JPS59145564 A JP S59145564A JP 58020044 A JP58020044 A JP 58020044A JP 2004483 A JP2004483 A JP 2004483A JP S59145564 A JPS59145564 A JP S59145564A
Authority
JP
Japan
Prior art keywords
circuit
integrated device
semiconductor integrated
wiring
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58020044A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0559584B2 (enrdf_load_stackoverflow
Inventor
Masahiro Watanabe
渡辺　政弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP58020044A priority Critical patent/JPS59145564A/ja
Publication of JPS59145564A publication Critical patent/JPS59145564A/ja
Publication of JPH0559584B2 publication Critical patent/JPH0559584B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic

Landscapes

  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
JP58020044A 1983-02-09 1983-02-09 半導体集積装置 Granted JPS59145564A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58020044A JPS59145564A (ja) 1983-02-09 1983-02-09 半導体集積装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58020044A JPS59145564A (ja) 1983-02-09 1983-02-09 半導体集積装置

Publications (2)

Publication Number Publication Date
JPS59145564A true JPS59145564A (ja) 1984-08-21
JPH0559584B2 JPH0559584B2 (enrdf_load_stackoverflow) 1993-08-31

Family

ID=12016053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58020044A Granted JPS59145564A (ja) 1983-02-09 1983-02-09 半導体集積装置

Country Status (1)

Country Link
JP (1) JPS59145564A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1988002791A1 (en) * 1986-10-11 1988-04-21 Nippon Telegraph And Telephone Corporation Thin film formation apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS492872A (enrdf_load_stackoverflow) * 1972-04-22 1974-01-11
JPS57111045A (en) * 1980-12-26 1982-07-10 Fujitsu Ltd Laying out method for integrated circuit cell

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS492872A (enrdf_load_stackoverflow) * 1972-04-22 1974-01-11
JPS57111045A (en) * 1980-12-26 1982-07-10 Fujitsu Ltd Laying out method for integrated circuit cell

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1988002791A1 (en) * 1986-10-11 1988-04-21 Nippon Telegraph And Telephone Corporation Thin film formation apparatus
US4874497A (en) * 1986-10-11 1989-10-17 Nippon Telegraph And Telephone Corporation Thin film forming apparatus

Also Published As

Publication number Publication date
JPH0559584B2 (enrdf_load_stackoverflow) 1993-08-31

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