JPS59139195A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JPS59139195A
JPS59139195A JP58012501A JP1250183A JPS59139195A JP S59139195 A JPS59139195 A JP S59139195A JP 58012501 A JP58012501 A JP 58012501A JP 1250183 A JP1250183 A JP 1250183A JP S59139195 A JPS59139195 A JP S59139195A
Authority
JP
Japan
Prior art keywords
cas
ext
buffer circuit
signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58012501A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0249509B2 (enExample
Inventor
Kazuyasu Fujishima
一康 藤島
Kazuhiro Shimotori
下酉　和博
Hideyuki Ozaki
尾崎　英之
Hideji Miyatake
秀司 宮武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58012501A priority Critical patent/JPS59139195A/ja
Priority to US06/568,138 priority patent/US4586167A/en
Publication of JPS59139195A publication Critical patent/JPS59139195A/ja
Publication of JPH0249509B2 publication Critical patent/JPH0249509B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
JP58012501A 1983-01-24 1983-01-26 半導体記憶装置 Granted JPS59139195A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58012501A JPS59139195A (ja) 1983-01-26 1983-01-26 半導体記憶装置
US06/568,138 US4586167A (en) 1983-01-24 1984-01-04 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58012501A JPS59139195A (ja) 1983-01-26 1983-01-26 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS59139195A true JPS59139195A (ja) 1984-08-09
JPH0249509B2 JPH0249509B2 (enExample) 1990-10-30

Family

ID=11807109

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58012501A Granted JPS59139195A (ja) 1983-01-24 1983-01-26 半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS59139195A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62103895A (ja) * 1985-08-07 1987-05-14 テキサス　インスツルメンツ　インコ−ポレイテツド 半導体メモリおよびその動作方法
JPS62134894A (ja) * 1985-12-06 1987-06-17 Mitsubishi Electric Corp 半導体記憶装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS581891A (ja) * 1982-04-23 1983-01-07 Hitachi Ltd モノリシツク記憶装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS581891A (ja) * 1982-04-23 1983-01-07 Hitachi Ltd モノリシツク記憶装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62103895A (ja) * 1985-08-07 1987-05-14 テキサス　インスツルメンツ　インコ−ポレイテツド 半導体メモリおよびその動作方法
JPS62134894A (ja) * 1985-12-06 1987-06-17 Mitsubishi Electric Corp 半導体記憶装置

Also Published As

Publication number Publication date
JPH0249509B2 (enExample) 1990-10-30

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