JPS59136862A - マルチコンピユ−タシステムにおける割込み制御装置 - Google Patents

マルチコンピユ−タシステムにおける割込み制御装置

Info

Publication number
JPS59136862A
JPS59136862A JP58009882A JP988283A JPS59136862A JP S59136862 A JPS59136862 A JP S59136862A JP 58009882 A JP58009882 A JP 58009882A JP 988283 A JP988283 A JP 988283A JP S59136862 A JPS59136862 A JP S59136862A
Authority
JP
Japan
Prior art keywords
interrupt
computer
memory
address
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58009882A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6349815B2 (enrdf_load_stackoverflow
Inventor
Sumihisa Saitou
純寿 斉藤
Mitsuo Takakura
高倉　満郎
Tadashi Okamoto
正 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58009882A priority Critical patent/JPS59136862A/ja
Publication of JPS59136862A publication Critical patent/JPS59136862A/ja
Publication of JPS6349815B2 publication Critical patent/JPS6349815B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
JP58009882A 1983-01-26 1983-01-26 マルチコンピユ−タシステムにおける割込み制御装置 Granted JPS59136862A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58009882A JPS59136862A (ja) 1983-01-26 1983-01-26 マルチコンピユ−タシステムにおける割込み制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58009882A JPS59136862A (ja) 1983-01-26 1983-01-26 マルチコンピユ−タシステムにおける割込み制御装置

Publications (2)

Publication Number Publication Date
JPS59136862A true JPS59136862A (ja) 1984-08-06
JPS6349815B2 JPS6349815B2 (enrdf_load_stackoverflow) 1988-10-05

Family

ID=11732521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58009882A Granted JPS59136862A (ja) 1983-01-26 1983-01-26 マルチコンピユ−タシステムにおける割込み制御装置

Country Status (1)

Country Link
JP (1) JPS59136862A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987006370A1 (en) * 1986-04-15 1987-10-22 Fanuc Ltd Interrupt control method in a multiprocessor system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987006370A1 (en) * 1986-04-15 1987-10-22 Fanuc Ltd Interrupt control method in a multiprocessor system

Also Published As

Publication number Publication date
JPS6349815B2 (enrdf_load_stackoverflow) 1988-10-05

Similar Documents

Publication Publication Date Title
JPS60254346A (ja) マルチプロセツサシステム
KR900005287A (ko) 데이타 제어 장치 및 그것을 사용하는 시스템
US4864491A (en) Memory device
GB2060961A (en) Data processing system having memory modules with distributed address information
JPS59136862A (ja) マルチコンピユ−タシステムにおける割込み制御装置
JP2000181891A (ja) 共有メモリアクセス順序保証方式
JPS6242306B2 (enrdf_load_stackoverflow)
US6535992B1 (en) DRAM auto-swapping device
JPS6111876A (ja) デ−タ転送方式
JPH0715670B2 (ja) デ−タ処理装置
JPS59173828A (ja) デ−タ処理システム
JP2929631B2 (ja) プロセッサ間通信装置
US4330842A (en) Valid memory address pin elimination
JPS58169264A (ja) メモリアクセス方式
JPS62102354A (ja) アクセス制御方式
JPS59165171A (ja) マルチプロセツサシステムにおける個別リセツト方式
JP2606477Y2 (ja) データ処理装置及び入・出力ボード
JP3019627B2 (ja) データ検索装置
KR920000401B1 (ko) 데이터 버퍼링회로
JP2968636B2 (ja) マイクロコンピュータ
JPS6257050A (ja) 共有メモリ装置
JPS6370994A (ja) 半導体集積回路装置
JPS60134362A (ja) メモリ装置
JPS6379161A (ja) 半導体記憶装置
JPH07121483A (ja) 共有メモリアクセス制御回路