JPS59135600U - Electronic equipment with rewritable non-volatile memory - Google Patents

Electronic equipment with rewritable non-volatile memory

Info

Publication number
JPS59135600U
JPS59135600U JP2774483U JP2774483U JPS59135600U JP S59135600 U JPS59135600 U JP S59135600U JP 2774483 U JP2774483 U JP 2774483U JP 2774483 U JP2774483 U JP 2774483U JP S59135600 U JPS59135600 U JP S59135600U
Authority
JP
Japan
Prior art keywords
data
electronic equipment
written
rewriting
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2774483U
Other languages
Japanese (ja)
Inventor
幸光 渡辺
Original Assignee
株式会社アドバンテスト
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社アドバンテスト filed Critical 株式会社アドバンテスト
Priority to JP2774483U priority Critical patent/JPS59135600U/en
Publication of JPS59135600U publication Critical patent/JPS59135600U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

、　　第１図Ａ、　Ｂは従来の不揮発生メモリの実施例
を示すブロック図、第２図はこの考案の一実施例を示す
ブロック図、第３図はＦＲＯＭ　８の使用状態を説明す
るための図である。 １：μＣＰＵ、２：ＣＭＯ３−ＲＡＭ、３：制御回路、
４　：Ｂａｔｔｅｒｙ、　５　：ＥＥＰＲＯＭ、　？　
：電源回路、８：ＦＲＯＭ、９：書き込み電圧発生回路
、１１：入力端子、１２：Ａ／Ｄ変換器、１３：表示器
。 八　　　− Ｂ, FIGS. 1A and 1B are block diagrams showing an embodiment of a conventional non-volatile memory, FIG. 2 is a block diagram showing an embodiment of this invention, and FIG. 3 is a block diagram for explaining the usage state of FROM 8. It is a diagram. 1: μCPU, 2: CMO3-RAM, 3: Control circuit,
4:Battery, 5:EEPROM, ?
: power supply circuit, 8: FROM, 9: write voltage generation circuit, 11: input terminal, 12: A/D converter, 13: display. Eight-B

Claims (1)

【実用新案登録請求の範囲】 マイクロ・コンピュータを有し、一定期間毎に記憶され
たデータの書き換えが必要な電子機器において、 Ａ　該データの容量よりも数倍以上の容量を有し、デー
タ書き換えの際には従前データの先頭アト゛　レスに使
用済であるデータを書き込み、使用さ′　　　　　れて
いない先頭アドレスに使用中のフラグ記号を書き込み、
その後のアドレスに新しいデータを書き込むＦＲＯＭと
、 Ｂ　書き込み電圧発生回路と、 Ｃデータ書き換えの際には該ＦＲＯＭと該書き込み電圧
発生回路とを接続し、データ使用の期間は該ＦＲＯＭを
一定電位に接続するスイッチと、 からなることを特徴とする電子機器。[Scope of Claim for Utility Model Registration] Electronic equipment that has a microcomputer and requires rewriting of stored data at regular intervals, A. Having a capacity several times larger than the data capacity and requiring data rewriting. In this case, the used data is written to the first address of the previous data, the flag symbol in use is written to the unused first address,
A FROM in which new data is written to the subsequent address; B a write voltage generation circuit; C Connect the FROM and the write voltage generation circuit when rewriting data, and connect the FROM to a constant potential during data use. An electronic device comprising: a switch that performs a switch;
JP2774483U 1983-02-25 1983-02-25 Electronic equipment with rewritable non-volatile memory Pending JPS59135600U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2774483U JPS59135600U (en) 1983-02-25 1983-02-25 Electronic equipment with rewritable non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2774483U JPS59135600U (en) 1983-02-25 1983-02-25 Electronic equipment with rewritable non-volatile memory

Publications (1)

Publication Number Publication Date
JPS59135600U true JPS59135600U (en) 1984-09-10

Family

ID=30158625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2774483U Pending JPS59135600U (en) 1983-02-25 1983-02-25 Electronic equipment with rewritable non-volatile memory

Country Status (1)

Country Link
JP (1) JPS59135600U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61258462A (en) * 1986-05-23 1986-11-15 Hitachi Ltd Assembly of electronic component parts
JP2010535365A (en) * 2007-05-03 2010-11-18 テゴ，インコーポレイテッド Multiple radio frequency network node RFID tag using OTP memory system

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5455127A (en) * 1977-10-12 1979-05-02 Hitachi Ltd Microcomputer
JPS54160141A (en) * 1978-06-09 1979-12-18 Nec Corp Read only memory unit with correcting function
JPS551607A (en) * 1978-06-16 1980-01-08 Nec Corp Read data correction system of mask read-only memory
JPS5522246U (en) * 1978-07-31 1980-02-13
JPS5637893A (en) * 1979-08-31 1981-04-11 Toshiba Corp Address change-over unit of programmable read-only memory

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5455127A (en) * 1977-10-12 1979-05-02 Hitachi Ltd Microcomputer
JPS54160141A (en) * 1978-06-09 1979-12-18 Nec Corp Read only memory unit with correcting function
JPS551607A (en) * 1978-06-16 1980-01-08 Nec Corp Read data correction system of mask read-only memory
JPS5522246U (en) * 1978-07-31 1980-02-13
JPS5637893A (en) * 1979-08-31 1981-04-11 Toshiba Corp Address change-over unit of programmable read-only memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61258462A (en) * 1986-05-23 1986-11-15 Hitachi Ltd Assembly of electronic component parts
JP2010535365A (en) * 2007-05-03 2010-11-18 テゴ，インコーポレイテッド Multiple radio frequency network node RFID tag using OTP memory system

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