JPS60166006U - programmable controller - Google Patents
programmable controllerInfo
- Publication number
- JPS60166006U JPS60166006U JP5197584U JP5197584U JPS60166006U JP S60166006 U JPS60166006 U JP S60166006U JP 5197584 U JP5197584 U JP 5197584U JP 5197584 U JP5197584 U JP 5197584U JP S60166006 U JPS60166006 U JP S60166006U
- Authority
- JP
- Japan
- Prior art keywords
- programmable controller
- signal lines
- terminal side
- cpu
- abstract
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例に係るpcの配置を示す説明
図、゛第2図はその回路構成を示すブロック図、第3図
はI10用スロット及び高機能I10用スロットの結線
を示した説明図である。
10・・・基本シャーシ、11・・・電源部、12・・
・CPU、 13 a〜13 C−110% 14−
・・高機能I10.20・・・データバス、21.22
・・・アドレスバス、33c・・・I /lスロット、
34・・・高機能I10用スロット。Fig. 1 is an explanatory diagram showing the arrangement of a PC according to an embodiment of the present invention, Fig. 2 is a block diagram showing its circuit configuration, and Fig. 3 shows the connection of the I10 slot and the high-performance I10 slot. FIG. 10... Basic chassis, 11... Power supply section, 12...
・CPU, 13 a~13 C-110% 14-
・・High performance I10.20・・Data bus, 21.22
...address bus, 33c...I/l slot,
34...Slot for high-performance I10.
Claims (1)
なうプログラマブルコントローラにおいて、 外部機器との間でデータの授受を行なうIloのス請ン
トのうち、特定のスロットの一方の端子側に、CPUか
らの全信号ラインめうち単機能I10駆動用の信号ライ
ンを結線し、他方の端子側に、前記全信号ラインの残り
の信号ラインを結線したことを特徴とするプログラマブ
ルコントロ[Claims for Utility Model Registration] In a programmable controller that performs control operations based on a program stored in a memory, one of the Ilo tasks that exchanges data with an external device, one of the specific slots. A programmable controller characterized in that a signal line for driving a single function I10 among all signal lines from a CPU is connected to a terminal side, and the remaining signal lines of all the signal lines are connected to the other terminal side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5197584U JPS60166006U (en) | 1984-04-11 | 1984-04-11 | programmable controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5197584U JPS60166006U (en) | 1984-04-11 | 1984-04-11 | programmable controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60166006U true JPS60166006U (en) | 1985-11-05 |
Family
ID=30571506
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5197584U Pending JPS60166006U (en) | 1984-04-11 | 1984-04-11 | programmable controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60166006U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210043672A (en) * | 2018-08-20 | 2021-04-21 | 지멘스 악티엔게젤샤프트 | Programmable Logic Controller-Based Modular Acceleration Module for Artificial Intelligence |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5474090A (en) * | 1977-11-24 | 1979-06-13 | Toyoda Mach Works Ltd | Sequence controller |
-
1984
- 1984-04-11 JP JP5197584U patent/JPS60166006U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5474090A (en) * | 1977-11-24 | 1979-06-13 | Toyoda Mach Works Ltd | Sequence controller |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210043672A (en) * | 2018-08-20 | 2021-04-21 | 지멘스 악티엔게젤샤프트 | Programmable Logic Controller-Based Modular Acceleration Module for Artificial Intelligence |
JP2021534506A (en) * | 2018-08-20 | 2021-12-09 | シーメンス アクチエンゲゼルシヤフトSiemens Aktiengesellschaft | Modular Acceleration Module for Artificial Intelligence Based on Programmable Logic Controller |
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