JPS5928725U - reset circuit - Google Patents
reset circuitInfo
- Publication number
- JPS5928725U JPS5928725U JP12101182U JP12101182U JPS5928725U JP S5928725 U JPS5928725 U JP S5928725U JP 12101182 U JP12101182 U JP 12101182U JP 12101182 U JP12101182 U JP 12101182U JP S5928725 U JPS5928725 U JP S5928725U
- Authority
- JP
- Japan
- Prior art keywords
- reset
- circuit
- output
- reset circuit
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の瞬時停止検出回路を含む電子回路の一例
を示す図、第2図は電源断における第1図の各部の波形
を示す図、第3図は本考案による一実施例の構成を示す
図、第4図は電源断における第3図の各部の波形を示す
図である。
1・・・・・・CPU、2・・・・・・割込コントロー
ラ、3・・・・・・瞬時停止検出回路、4・・・・・・
パワーオンリセット回路、5・・・・・・ペリフェラル
インタフェース、6・・・・・・データバス、7・・・
・・・他のシステム、8・・・・・・電源、9・・・・
・・電圧安定化回路、10・・・・・・単安定回路、1
1・・・・・・オア回路。FIG. 1 is a diagram showing an example of an electronic circuit including a conventional instantaneous stop detection circuit, FIG. 2 is a diagram showing waveforms of each part of FIG. FIG. 4 is a diagram showing waveforms of various parts in FIG. 3 when the power is turned off. 1...CPU, 2...Interrupt controller, 3...Momentary stop detection circuit, 4...
Power-on reset circuit, 5... Peripheral interface, 6... Data bus, 7...
...Other systems, 8...Power supply, 9...
... Voltage stabilization circuit, 10 ... Monostable circuit, 1
1....OR circuit.
Claims (2)
システムにおいて、割込処理完了直後にそのシステムの
出力端子よりパルスを出力し、これをそのシステムのリ
セット端子に入力し、リセット状態とするようにしたリ
セット回路。(1) In an electronic circuit system that detects interruption of power supply voltage and performs interrupt processing, a pulse is output from the output terminal of the system immediately after completion of the interrupt processing, and this is input to the reset terminal of the system to reset the system. A reset circuit that is set to the state.
電子回路システムのリセット端子に入力するようにした
実用新案登録請求の範囲第(1)項記載のリセット回路
。(2) The reset circuit according to claim (1), wherein the output pulse from the output terminal is input to the reset terminal of the electronic circuit system via a monostable circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12101182U JPS5928725U (en) | 1982-08-11 | 1982-08-11 | reset circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12101182U JPS5928725U (en) | 1982-08-11 | 1982-08-11 | reset circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5928725U true JPS5928725U (en) | 1984-02-22 |
Family
ID=30277117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12101182U Pending JPS5928725U (en) | 1982-08-11 | 1982-08-11 | reset circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5928725U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63120009A (en) * | 1986-11-05 | 1988-05-24 | Kiyoshi Nakajima | Chamfering machine |
-
1982
- 1982-08-11 JP JP12101182U patent/JPS5928725U/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63120009A (en) * | 1986-11-05 | 1988-05-24 | Kiyoshi Nakajima | Chamfering machine |
JPH0343007B2 (en) * | 1986-11-05 | 1991-07-01 | Kyoshi Nakajima |
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