JPS59136687U - Power outage guarantee circuit for display terminal equipment - Google Patents
Power outage guarantee circuit for display terminal equipmentInfo
- Publication number
- JPS59136687U JPS59136687U JP3113883U JP3113883U JPS59136687U JP S59136687 U JPS59136687 U JP S59136687U JP 3113883 U JP3113883 U JP 3113883U JP 3113883 U JP3113883 U JP 3113883U JP S59136687 U JPS59136687 U JP S59136687U
- Authority
- JP
- Japan
- Prior art keywords
- power outage
- guarantee circuit
- display terminal
- display
- terminal equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Audible And Visible Signals (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の表示用端末装置の一実施例を示すブロ
ック図、第2図は停電時におけるその動作を示す各部の
波形図である。
1・・・・・・端末装置、2・・・・・・センタ、3・
・・・・・制御部、4・・・・・・表示情報バッファ、
5・・・・・・電光表示板、6・・・・・・保証回路、
7・・・・・・停電検知タイマ。FIG. 1 is a block diagram showing an embodiment of the display terminal device of the present invention, and FIG. 2 is a waveform diagram of each part showing its operation during a power outage. 1...Terminal device, 2...Center, 3.
...Control unit, 4...Display information buffer,
5...Electronic display board, 6...Guarantee circuit,
7...Power failure detection timer.
Claims (1)
情報記憶手段と、該表示情報記憶手段に従って表示を行
う表示部とを有する表示用端末袋′ 置において、 停電時に前記記憶手段の記憶内容を所定時間保持するデ
ータ保証回路と、 前記保証回路のデータ保証時間以下の動作時間を有する
タイマ手段と、 前記タイマ手段の動作時間以上の停電の時にのみセンタ
に表示データの再送を求める制御手段と、を具備するこ
とを特徴とする表示用端末装置の停電保証回路。[Scope of Claim for Utility Model Registration] In a display terminal device having a display information storage means for temporarily holding display data transmitted from a center and a display section that displays according to the display information storage means, in the event of a power outage, a data guarantee circuit that retains the memory contents of the storage means for a predetermined period of time; a timer means having an operation time that is less than or equal to the data guarantee time of the guarantee circuit; A power outage guarantee circuit for a display terminal device, comprising a control means for requesting retransmission.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3113883U JPS59136687U (en) | 1983-03-03 | 1983-03-03 | Power outage guarantee circuit for display terminal equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3113883U JPS59136687U (en) | 1983-03-03 | 1983-03-03 | Power outage guarantee circuit for display terminal equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59136687U true JPS59136687U (en) | 1984-09-12 |
JPH019983Y2 JPH019983Y2 (en) | 1989-03-20 |
Family
ID=30161993
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3113883U Granted JPS59136687U (en) | 1983-03-03 | 1983-03-03 | Power outage guarantee circuit for display terminal equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59136687U (en) |
-
1983
- 1983-03-03 JP JP3113883U patent/JPS59136687U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH019983Y2 (en) | 1989-03-20 |
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