JPS59127841A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59127841A
JPS59127841A JP58002197A JP219783A JPS59127841A JP S59127841 A JPS59127841 A JP S59127841A JP 58002197 A JP58002197 A JP 58002197A JP 219783 A JP219783 A JP 219783A JP S59127841 A JPS59127841 A JP S59127841A
Authority
JP
Japan
Prior art keywords
amorphous silicon
boron
substrate
oxidation
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58002197A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0228250B2 (OSRAM
Inventor
Yoshihito Amamiya
好仁 雨宮
Toshiro Ogino
俊郎 荻野
Katsumi Murase
村瀬　克実
Masahiro Sakagami
坂上　正裕
Yoshihiko Mizushima
宜彦 水島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP58002197A priority Critical patent/JPS59127841A/ja
Publication of JPS59127841A publication Critical patent/JPS59127841A/ja
Publication of JPH0228250B2 publication Critical patent/JPH0228250B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P95/00—

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
JP58002197A 1983-01-12 1983-01-12 半導体装置の製造方法 Granted JPS59127841A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58002197A JPS59127841A (ja) 1983-01-12 1983-01-12 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58002197A JPS59127841A (ja) 1983-01-12 1983-01-12 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59127841A true JPS59127841A (ja) 1984-07-23
JPH0228250B2 JPH0228250B2 (OSRAM) 1990-06-22

Family

ID=11522628

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58002197A Granted JPS59127841A (ja) 1983-01-12 1983-01-12 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59127841A (OSRAM)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453562A (en) * 1987-08-25 1989-03-01 Sony Corp Formation of wiring
US6333266B1 (en) 1998-03-12 2001-12-25 Nec Corporation Manufacturing process for a semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5676537A (en) * 1979-11-27 1981-06-24 Fujitsu Ltd Manufacture of semiconductor device
JPS5772333A (en) * 1980-10-23 1982-05-06 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5676537A (en) * 1979-11-27 1981-06-24 Fujitsu Ltd Manufacture of semiconductor device
JPS5772333A (en) * 1980-10-23 1982-05-06 Fujitsu Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453562A (en) * 1987-08-25 1989-03-01 Sony Corp Formation of wiring
US6333266B1 (en) 1998-03-12 2001-12-25 Nec Corporation Manufacturing process for a semiconductor device

Also Published As

Publication number Publication date
JPH0228250B2 (OSRAM) 1990-06-22

Similar Documents

Publication Publication Date Title
JP2684455B2 (ja) 薄い絶縁体上シリコン層の製造方法
JP3265493B2 (ja) Ｓｏｉ基板の製造方法
JP2006524426A (ja) 基板上に歪層を製造する方法と層構造
EP0061388A2 (en) Binary germanium-silicon interconnect structure for integrated circuits
JP3204855B2 (ja) 半導体基板の製造方法
WO2004075298A1 (ja) Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ
US5951755A (en) Manufacturing method of semiconductor substrate and inspection method therefor
JP4732725B2 (ja) 実質的に準安定なＳｉＧｅ層とその形成方法
JP3454033B2 (ja) シリコンウェーハおよびその製造方法
JPH05217893A (ja) 半導体基材の作製方法
EP0449589A1 (en) Method of producing a SOI structure
JPH09199416A (ja) 半導体基板とその製造方法
JPH10303208A (ja) 半導体基板およびその製造方法
JP4189041B2 (ja) 半導体基板の製造方法およびその検査方法
JPS59127841A (ja) 半導体装置の製造方法
JPH0964319A (ja) Ｓｏｉ基板およびその製造方法
JPH05326467A (ja) 半導体基板及びその製造方法
JPS5812732B2 (ja) 半導体装置の製法
JPH11214322A (ja) シリコン半導体基板の製造方法
Tamaki et al. Evaluation of dislocation generation on silicon substrates by selective oxidation
JPH07297151A (ja) 半導体装置の製造方法
JPS6326541B2 (OSRAM)
JPS5982744A (ja) Ｓｏｓ基板の製造法
JPH09199379A (ja) 高品位エピタキシャルウエハ及びその製造方法
JPS6012775B2 (ja) 異質基板上への単結晶半導体層形成方法