JPS59124744A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS59124744A
JPS59124744A JP23378982A JP23378982A JPS59124744A JP S59124744 A JPS59124744 A JP S59124744A JP 23378982 A JP23378982 A JP 23378982A JP 23378982 A JP23378982 A JP 23378982A JP S59124744 A JPS59124744 A JP S59124744A
Authority
JP
Japan
Prior art keywords
substrates
substrate
end surfaces
board
capacitors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23378982A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0473298B2 (fr
Inventor
Hidehiko Akasaki
赤崎 英彦
Takehisa Tsujimura
辻村 剛久
Kiyoshi Miyasaka
宮坂 清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23378982A priority Critical patent/JPS59124744A/ja
Publication of JPS59124744A publication Critical patent/JPS59124744A/ja
Publication of JPH0473298B2 publication Critical patent/JPH0473298B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP23378982A 1982-12-29 1982-12-29 半導体装置 Granted JPS59124744A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23378982A JPS59124744A (ja) 1982-12-29 1982-12-29 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23378982A JPS59124744A (ja) 1982-12-29 1982-12-29 半導体装置

Publications (2)

Publication Number Publication Date
JPS59124744A true JPS59124744A (ja) 1984-07-18
JPH0473298B2 JPH0473298B2 (fr) 1992-11-20

Family

ID=16960588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23378982A Granted JPS59124744A (ja) 1982-12-29 1982-12-29 半導体装置

Country Status (1)

Country Link
JP (1) JPS59124744A (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63141352A (ja) * 1986-12-03 1988-06-13 Nec Corp 面実装集積回路モジユ−ル
JP2001110984A (ja) * 1999-10-13 2001-04-20 Hitachi Ltd 半導体モジュールおよびそれを用いた電気装置
JP2003110049A (ja) * 2001-09-28 2003-04-11 Fujitsu Ten Ltd 高周波icパッケージ、高周波icパッケージを使用する高周波ユニット及び、その製造方法
JP2010118639A (ja) * 2008-11-13 2010-05-27 Samsung Electro-Mechanics Co Ltd 半導体集積回路チップ、積層型チップキャパシタ及び半導体集積回路チップパッケージ

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5719738U (fr) * 1980-07-08 1982-02-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5719738U (fr) * 1980-07-08 1982-02-01

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63141352A (ja) * 1986-12-03 1988-06-13 Nec Corp 面実装集積回路モジユ−ル
JP2001110984A (ja) * 1999-10-13 2001-04-20 Hitachi Ltd 半導体モジュールおよびそれを用いた電気装置
JP2003110049A (ja) * 2001-09-28 2003-04-11 Fujitsu Ten Ltd 高周波icパッケージ、高周波icパッケージを使用する高周波ユニット及び、その製造方法
JP2010118639A (ja) * 2008-11-13 2010-05-27 Samsung Electro-Mechanics Co Ltd 半導体集積回路チップ、積層型チップキャパシタ及び半導体集積回路チップパッケージ
US8304854B2 (en) 2008-11-13 2012-11-06 Samsung Electro-Mechanics Co., Ltd. Semiconductor integrated circuit chip, multilayer chip capacitor and semiconductor integrated circuit chip package

Also Published As

Publication number Publication date
JPH0473298B2 (fr) 1992-11-20

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