JPS59121866A - 半導体メモリ素子の製造方法 - Google Patents

半導体メモリ素子の製造方法

Info

Publication number
JPS59121866A
JPS59121866A JP57227296A JP22729682A JPS59121866A JP S59121866 A JPS59121866 A JP S59121866A JP 57227296 A JP57227296 A JP 57227296A JP 22729682 A JP22729682 A JP 22729682A JP S59121866 A JPS59121866 A JP S59121866A
Authority
JP
Japan
Prior art keywords
type impurity
type
capacitor
gate
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57227296A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0342513B2 (enExample
Inventor
Akio Kita
北 明夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP57227296A priority Critical patent/JPS59121866A/ja
Publication of JPS59121866A publication Critical patent/JPS59121866A/ja
Publication of JPH0342513B2 publication Critical patent/JPH0342513B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP57227296A 1982-12-28 1982-12-28 半導体メモリ素子の製造方法 Granted JPS59121866A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57227296A JPS59121866A (ja) 1982-12-28 1982-12-28 半導体メモリ素子の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57227296A JPS59121866A (ja) 1982-12-28 1982-12-28 半導体メモリ素子の製造方法

Publications (2)

Publication Number Publication Date
JPS59121866A true JPS59121866A (ja) 1984-07-14
JPH0342513B2 JPH0342513B2 (enExample) 1991-06-27

Family

ID=16858586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57227296A Granted JPS59121866A (ja) 1982-12-28 1982-12-28 半導体メモリ素子の製造方法

Country Status (1)

Country Link
JP (1) JPS59121866A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5093702A (en) * 1988-11-28 1992-03-03 Nec Electronics, Inc. Method of alignment for semiconductor memory device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5645066A (en) * 1979-09-19 1981-04-24 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device and manufacture therefor
JPS5649555A (en) * 1979-09-28 1981-05-06 Hitachi Ltd Semiconductor memory and manufacture thereof
JPS5685853A (en) * 1979-12-14 1981-07-13 Hitachi Ltd Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5645066A (en) * 1979-09-19 1981-04-24 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device and manufacture therefor
JPS5649555A (en) * 1979-09-28 1981-05-06 Hitachi Ltd Semiconductor memory and manufacture thereof
JPS5685853A (en) * 1979-12-14 1981-07-13 Hitachi Ltd Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5093702A (en) * 1988-11-28 1992-03-03 Nec Electronics, Inc. Method of alignment for semiconductor memory device

Also Published As

Publication number Publication date
JPH0342513B2 (enExample) 1991-06-27

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