JPS59121856A - Manufacture of electrode wirings of semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate the overhang of an insulating film on a lower wiring end by forming the first insulting film on the entire surface on which meta except lower wiring metal is removed, then adhering the first insulating film on the side surface of a lower wiring metal by directional etching, and forming the second insulating film on the overal surface. CONSTITUTION:A lower wiring metal 3 is formed by removing metal except lower wiring metal 3 by photolithographic etching technique. Then, an insulating film 4 of the thickness of an Si3N4 film is covered on the overal surface. Then, the film 4 is removed by directional ion etching, and the film 4 of remaining SiO2 or PSG, Si3N4 not etched is adhered to the side surface of the metal 3. Then, an insulating film 5 such as Si3N4 is formed on the overal surface by SiO2, PSG or plasma reaction produced by a CVD. Since the film 4 is adhered to the side face of the metal 3, no overhang is observed at the end of the metal 3, and the shape of smooth film 5 is obtained at the end.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method for manufacturing electrode wiring of a four-conductor device, which allows multilayer wiring to be obtained with ease.

(Prior Art) A conventional method for manufacturing multilayer wiring is shown in FIG. In this FIG. 1(a), 1 is a Si substrate, 2 is a 5in2.3 is Al deposited by vapor deposition or sputtering, A
1 alloy, a high-melting point metal such as Mo, W, or PtSi, or a silicide compound metal for the lower wiring.

In FIG. 1(b), metals other than the lower wiring metal 3 have been removed by a known photolithography and etching technique.

In addition, 4 in Fig. 1(c) is SjO□, P by CVD.
S i , N generated by SG or pragma reaction
This is an insulation rupture such as No. 4. This 5in2. When an insulating film 4 such as PSG or 5isN
), when the lower wiring metal 6 is deposited by vapor deposition or sputtering, the edge 5 of the overhang
The upper wiring metal 6 may become thinner at this portion, or in extreme cases, the wire may break.

Furthermore, when removing metals other than the upper wiring metal 6 using known photolithography and etching techniques,
The coverage at the end 5 of the resist overhang is poor;
There is a drawback that the upper wiring metal 6 is exposed and the metal of the upper wiring metal 6 is removed.

(Object of the Invention) The present invention has been made to eliminate the above-mentioned conventional drawbacks.
It is an object of the present invention to provide a method for manufacturing electrode wiring of a semiconductor device that can eliminate wiring.

(Structure of the Invention) A method of manufacturing electrode wiring for a semiconductor device according to the present invention includes depositing a lower wiring metal on a semiconductor substrate via an insulating film, removing metal other than the lower wiring metal, and applying a first layer to the entire surface. After forming the first insulating film, a first insulating film is attached to the side surface of the lower wiring metal by directional etching.
The second insulating film is formed over the entire surface.

(Example) Hereinafter, an example of the method for manufacturing a semiconductor device of the present invention will be described based on the drawings. Figure 2 (a) to Figure 2 (
f) is a process explanatory diagram of one example.

In these FIGS. 2(a) to 2(f), the same parts as in FIGS. 1(a) to 1(d) will be described with the same reference numerals.

First, in FIG. 2(a), 1 is a Si substrate as a semiconductor substrate, 2 is a 5in2.3 is Al, A1 alloy, Mo, W attached by vapor deposition or slatting.
.

The lower wiring metal is a high melting point metal such as PtSi or a silicide compound.

This lower wiring metal 3 is, as shown in FIG. 2(b),
Metals other than the lower wiring metal 3 are removed by known photolithography and etching techniques.

Next, as shown in FIG. 2C, the entire surface is covered with a thick insulating film 4 of 5IO2 or PSG produced by CVD, or St, N, or the like produced by plasma reaction.

The insulating film 4 having this thickness preferably ranges from at least the same thickness as the previously deposited lower wiring metal 3 to approximately 10% thicker.

Next, as shown in FIG. 2(d), 5i02 or P S G , Si
s The insulating film 4 such as N4 is removed, but the 5iOz remaining without being etched is left on the side surface of the lower wiring metal 3.
Alternatively, an insulating coating 4 such as PSG, 513N<, etc. is attached.

Next, as shown in FIG. 2(e), an insulating film 5 of 5102 or PSG produced by CVD or Si3N by plasma reaction is produced over the entire surface.

In this example, because the insulating film 4 is attached to the side surface of the lower wiring metal 3, the oat ( )-ring condition that occurs at the edge of the conventional lower wiring metal 3 is not observed, and the edge is smooth. Therefore, the shape of the insulating saddle film 5 can be obtained as shown in FIG. 2 (
When the lower wiring metal 6 is deposited by vapor deposition or sputtering as shown in f), the upper wiring metal 6 becomes thinner at the end of the lower wiring metal 3 as shown in FIG.
? M will no longer occur.

As explained above, in the first embodiment, in order to prevent the insulation coating 5 from forming at the end of the lower wiring metal 3, the insulation coating 4 is applied only to the side surface of the lower wiring metal 3. When the insulating film 5 is attached after this, since the end of the upper wiring metal 6 has a smooth slope, no overhang occurs and a smooth insulating film can be obtained. .

Furthermore, the metal for the upper wiring also eliminates the drawbacks such as disconnection at the ends or thinning, resulting in poor reliability.

(Effects of the Invention) As described above, according to the method for manufacturing electrode wiring of a semiconductor device of the present invention, a metal for lower wiring is attached onto a semiconductor substrate via an insulating film, and a metal other than the metal for lower wiring is attached to a semiconductor substrate through an insulating film. After the metal is removed and a first insulating film is formed on the entire surface, the first insulating film is adhered to the side surface of the lower wiring metal by directional etching, and a second insulating film is formed on the entire surface. As a result, the coverage of the insulating film at the end of the lower wiring metal can be improved and exposure of the lower wiring metal can be prevented. Along with this, not only the two-layer wiring structure of semiconductors, but also
Furthermore, it has the advantage that it can be used when stacking three or four layers.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are process explanatory diagrams for explaining a conventional method for manufacturing electrode wiring of a semiconductor device, and FIGS. 2(a) to 2(f) are respectively FIG. 3 is a process explanatory diagram of an embodiment of the method for manufacturing electrode wiring of a semiconductor device according to the present invention. DESCRIPTION OF SYMBOLS 1... Si substrate, 2... 5102.3... Metal for upper wiring, 4... Insulating coating, 5... Metal for upper wiring. 1. Diagram procedural amendment dated May 25, 1982 Kazuo Wakasugi, Commissioner of the Patent Office, 1. Indication of the case, 1982 Patent Application No. 227295, 2.
Name of the invention Method for manufacturing electrode wiring for a conductor device 3, Relationship with the case of the person making the amendment Patent Applicant (029) Oki Electric Industry Co., Ltd. 4, Agent 5, Amendment order daily publication Showa year, month, day (spontaneous) )6 4k of Detailed Description of the Invention of the Specification Subject to Amendment (1) Specification 1% Ill: Correct "7'Lagma" to "Plasma" on page 2, line 9.

Claims (1)

[Claims] A step of attaching metal for lower wiring onto the semiconductor substrate via an insulating film and removing metal other than the metal for lower wiring, and after removing metal other than the metal for lower wiring, a first step is applied to the entire surface. and directionally etching the first insulating film so that the first insulating film is adhered to the side surface of the lower wiring metal; 1. A method of manufacturing electrode wiring for a semiconductor device, which comprises the steps of forming a second insulating film on the entire surface after etching.