JP2616063B2 - Manufacturing method of bump electrode - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a bump electrode on a semiconductor integrated circuit substrate, and more particularly to a technique for forming a bump electrode on an element region of a substrate.

[Conventional technology]

There is a tendency that the number of external terminal electrodes increases due to the sophistication of the semiconductor integrated circuit. Therefore, it may not be possible to form all the bump electrodes in the non-element region around the substrate. In such a case, a method is known in which a buried electrode is formed on an element region (active region) of an integrated circuit without increasing the chip size.

First, the plan layout of bump electrodes formed by the conventional method will be described with reference to FIG. In FIG.
For convenience of explanation, the plane of the substrate 2 is shown as being divided into a non-element region 2a where external terminal electrodes are formed and an element region (active region) 2b where various elements are formed. The external terminal electrodes 4a and 4b are arranged on the non-element region 2a so as to surround the element region 2b. Normally, bump electrodes are formed immediately above the external terminal electrode portions 4a and 4b, but since the non-element region 2a does not have an area for forming bump electrodes corresponding to all the external terminal electrode portions, a part thereof is formed. From the external terminal electrode portion 4b to the element region
The wiring 14 is extended on 2b, and the bump electrode 10b is formed on the element region 2b.
To form Therefore, the non-element region 2a
Since the bump electrode 10a formed on the upper surface and the bump electrode 10b formed on the element region 2b are arranged, the surface of the substrate is effectively used, and a large number of bump electrodes can be formed.

Next, a conventional method for forming a bump electrode will be described with reference to FIGS. 6 (a), 7 (a) and 8 (a) are cross-sectional views of the substrate 2 taken along the line AA 'shown in FIG. 6 (b), 7 (b) and 8 (b) are cross-sectional views of the substrate 2 taken along the line BB 'shown in FIG. FIG. 6 (a)
As shown in FIGS. 1 and 2, an oxide film 3 is formed on a substrate 2, and external terminal electrodes 4a and 4b made of aluminum are formed on the oxide film 3, and a plasma is further formed thereon.
A protection film 6 such as silicon nitride formed by CVD is formed. Openings 5a and 5b are formed in the protective film 6 by opening a window for electrode connection. In the BB 'cross section, as shown in FIG. Lead-in wiring 14 extending from electrode section 4b for use to element area 2b
Is formed by evaporating aluminum, and is further covered with a protective film 7 to form a multilayer wiring structure, and an opening 7a is provided in the protective film 7 on the element region 2b. Next, as shown in FIGS. 7 (a) and (b), the lead-in wiring on the external terminal electrode portion 4a in the section AA 'and on the element region in the section BB' A barrier layer 8a made of chromium, a metal for adhesion in the first layer, and copper, a metal for diffusion barrier in the second layer,
And 8b. Finally, as shown in FIGS. 8A and 8B, a mask is formed from a resist, and electrolytic plating is performed through the mask to form a barrier layer 8a and a resist.
Copper bump electrodes 10a and 10b are formed on 8b.

[Problems to be solved by the invention]

The conventional method for manufacturing a bump electrode has the following problems.

First, the formation of the bump electrode 10b located in the element region 2b requires an extra step of forming the lead-in wiring 14 by a multilayer wiring technique as compared with the formation of the bump electrode 10 located in the external terminal region 2a. Therefore, the number of steps increases and the cost increases.

Further, since metals such as chromium and copper used for the adhesion and diffusion barrier used for the barrier layers 8a and 8b are easily corroded, the conductivity with the external terminal electrode is deteriorated, and the bump electrode is peeled off due to thermal strain or the like. There is a risk.

Therefore, the present invention is to solve the above problems,
An object of the present invention is to improve the durability of the bump electrode without increasing the number of steps by forming a lead-in wiring using a conventional process and adding a corrosion preventing means.

[Means for solving the problem]

In order to solve the above problems, the measures taken by the present invention are to provide a first element in a non-element region of a substrate whose surface is covered with a protective film.
And exposing the second plurality of external terminal electrode portions, and when a barrier layer is conductively deposited on the first external terminal electrode portion, the element region of the substrate is On the protective film, an underlayer for a bump electrode and a lead-in wire for connecting the underlayer for a bump electrode and a second external terminal electrode portion are formed of the same material as the barrier layer, and thereafter formed simultaneously. A bump electrode is formed on the barrier layer of the non-element region and the underlayer for the bump electrode of the element region. Finally, the lead-in wiring and the exposed region of the bump electrode are formed by electroless plating of a corrosion-resistant metal. It is to be coated.

[Action]

 According to such means, the following effects can be obtained.

As in the conventional case, the bump electrodes are dispersed and formed not only on the non-element region of the substrate but also on the element region, so that a large number of bump electrodes can be formed without increasing the substrate size. Since the lead-in wiring extending from the element region to the element region is formed simultaneously with the same material as the barrier layer, a separate process for forming the wiring is not required, and the same process as the bump electrode formed on the non-device region is performed in parallel. Since a bump electrode in the element region can be formed by using this method, there is no waste in the process.

Furthermore, since the bump electrode and the lead-in wiring are covered with a corrosion-resistant metal after the formation of the bump electrode, the occurrence of corrosion of the lead-in wiring together with the bump electrode can be prevented.

In addition, since the step of coating with the corrosion-resistant metal is performed by electroless plating, the process is simple and the production cost can be reduced.

〔Example〕

Next, an embodiment of a bump electrode according to the present invention will be described with reference to FIGS.

FIG. 1 shows a plan layout of bump electrodes on a substrate on which bump electrodes are formed according to the present embodiment.

A plurality of external terminal electrode portions 4a are formed in the non-element region 2a on the substrate 2.
And 4b are formed, and a bump electrode 10a is formed immediately above the external terminal electrode portion 4a via a barrier layer 8a,
The element region 2b conductively connected to the external terminal electrode portion 4b
A lead-in wiring 19 extending up to the upper surface is formed, and the lead-in wiring 19 is continuous with a bump electrode underlayer 9b on the element region 2b, and the bump electrode 10 is formed on the bump electrode underlayer 9b.
b is formed.

Next, a method for manufacturing a hump electrode according to an embodiment of the present invention will be described with reference to FIGS. FIGS. 2 (a), 3 (a) and 4 (a) show the first embodiment.
2 shows a cross-section taken along the line AA ′ in the figure. FIG. 2 (b), FIG. 3 (b) and FIG. 4 (b) correspond to FIG.
The cross section taken along line -B 'is shown.

As shown in FIGS. 2 (a) and 2 (b), external terminal electrodes 4a and 4b are formed on the non-element region 2a of the substrate 2,
These are covered with a protective film 6 such as a silicon nitride film or a silicon oxide film. This protective film 6 has an external terminal electrode 4
Openings 5a and 5b are provided immediately above a and 4b. Next, a barrier layer 8a made of a two-layer metal film of titanium and copper or chromium and copper is formed directly above the external terminal electrode portion 4a through the opening 5a by vacuum evaporation. The first layer of titanium or chromium is mainly used to enhance the adhesion to the external terminal electrode 4a, and the second layer of copper is used as a barrier for preventing alloying between the upper and lower layers or as a plating base. Things. The barrier layer is generally formed of two layers as described above, but may be formed of one layer or three or more layers. On the other hand, the bump electrode underlayer 9b and the external terminal electrode portion 4b on the element region 2b
Conductively connected through the opening 5b to the underlayer 9b for the bump electrode.
The wiring 19 connected to the barrier layer 8a is formed in parallel with the barrier layer 8a in the AA 'cross section. This drop wiring 19
The barrier layer may be formed of only one of the first and second layers.

Next, as shown in FIGS. 3 (a) and (b), A-
In the section A ', a copper bump electrode is formed by electrolytic plating on the barrier layer 8a formed immediately above the external terminal electrode 4a.
At this time, the bump electrode 10b is formed on the bump electrode base layer 9b on the element region 2b in the BB 'cross section.

Thereafter, as shown in FIGS. 4 (a) and 4 (b), the lead-in wiring 19 and the bump electrodes 10a and 10b are subjected to electroless plating using a plating solution of sodium hypophosphite, nickel chloride and ammonium hydroxide. Is coated with a nickel film having a thickness of 0.5 to 1.0 μm.
Electroless plating of gold with a thickness of 0.2μm, plating film 12a, 12b
To form In this case, without nickel plating.
Only electroless plating of gold having a thickness of 2 to 0.5 μm may be performed.

In this embodiment, since the lead-in wiring 19 extending on the element region 2b is formed of the same material at the same time as the barrier layer 8a, there is no need to provide a separate wiring forming step. The bump electrode 10a is formed in the non-element region 2a of the substrate 2 and the bump electrode 10b is formed in the element region 2b.
More bump electrodes can be formed than when bump electrodes are formed only in the upper non-element region 2a. Further, after the bump electrodes 10a, 10b are formed, the bump electrodes 10a, 10b and the lead-in wiring 19 are covered with a corrosion-resistant metal. Corrosion of the incoming wiring 19 can also be prevented.

In addition, since the step of coating with a corrosion-resistant metal is performed by electroless plating, manufacturing costs can be reduced.

〔The invention's effect〕

As described above, in the method for manufacturing a bump electrode according to the present invention, the lead-in wiring extending over the element region is formed of the same material at the same time as the barrier layer necessary for forming the bump electrode, and the bump electrode and the lead-in wiring are resistant to the wiring. Since it is characterized by being coated with a corrosive metal, the following effects can be obtained.

Since the lead-in wiring extending over the element region is formed of the same material at the same time as the barrier layer, a step of only forming the wiring is unnecessary while enabling the formation of the bump electrode on the element region.
Since the bump electrodes can be formed in the same step as the bump electrodes formed on the non-element regions in parallel, the manufacturing cost can be reduced.

Since the bump electrode and the lead-in wiring are covered with a corrosion-resistant metal, corrosion of the lead-in wiring can be prevented together with the bump electrode, and the bump electrode can be protected at the time of an environmental test or the like. Durability and reliability can be improved.

Since the step of coating with a corrosion-resistant metal is performed by electroless plating, the process is simple and the production cost can be kept low.

[Brief description of the drawings]

FIG. 1 is a plan view of a substrate showing a planar arrangement of bump electrodes formed according to an embodiment of the present invention. 2 (a), 3 (a) and 4 (a) are process cross-sectional views of an embodiment of the present invention showing a cross section of the substrate taken along line AA 'shown in FIG. It is. 2 (b), 3 (b) and 4 (b) are process cross-sectional views of an embodiment of the present invention showing a cross section of the substrate taken along the line BB 'shown in FIG. It is. FIG. 5 is a plan view of a substrate on which bump electrodes are formed by a conventional method. 6 (a), 7 (a) and 8 (a) show steps of a conventional bump electrode manufacturing method showing a cross section of the substrate cut along the line AA 'shown in FIG. It is sectional drawing. 6 (b), 7 (b) and 8 (b) show steps of a conventional bump electrode manufacturing method showing a cross section of the substrate cut along the line BB 'shown in FIG. It is sectional drawing. [Explanation of Symbols] 2 ... Substrate 2a ... Non-element region 2b ... Element region 3 ... Oxide film 4a, 4b ... External terminal electrode portion 5a, 5b ... Opening 6 ... Protective film 8a ... Barrier layer 9b: Bump electrode base layer 10a, 10b: Bump electrode 12a, 12b: Plating film 19: Lead-in wiring.

Claims (1)

(57) [Claims] A barrier layer is formed on a first external terminal electrode portion of a first and second plurality of external terminal electrode portions exposed in a non-element region of a substrate surface-coated with a protective film. At the time of deposition, a base layer for a bump electrode and a lead-in wiring to be connected to the base layer for a bump electrode and a second electrode part for an external terminal are formed of the same barrier material on the protective film in the element region of the substrate at the same time. Forming a bump electrode on the barrier layer of the non-element region and the bump electrode base layer of the element region formed at the same time. Covering the exposed region of the bump electrode by electroless plating of a corrosion-resistant metal.