JPS60196958A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent increasing of wiring resistance at a through-hole part and disconnection, by a method wherein the buried through-hole is formed by the second metal. CONSTITUTION:The second metal 22 is sputter-deposited on the first wiring 21. Then, photoresist 23 is applied on that second metal 22. Subsequently, makes only the second metal remain at the specified part by etching the second metal 22 making a photoresist 23 as a mask. At this time, some kind of side etching are carried out and eaves 24 of the photoresist 23 are made. Successively, the end part of the photoresist 23 are exposed by etching after an insulation film 25 is formed all the surface. After that, when insulation film 25 on the second metal is removed by the lift-off method, the second metal 22 remains only at the part on which the through-hole is formed, and the construction with flat surface on which the buried through-hole is formed, can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technology) The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly to a method for forming through-hole portions in multilayer wiring.

(Prior Art) In the process of forming multilayer interconnections in semiconductor integrated circuits, the process of forming through-hole portions is indispensable. Conventionally, the process of forming a through-hole portion is performed as shown in FIG. The method is explained in Figure 1 (
In a), 11 is a first wiring, and first, an intermediate insulating film 12 is formed on this first wiring 11 as shown in FIG. 1(b).

Next, a through hole 13 is formed in a predetermined portion of the intermediate insulating film 12 by photolithography, as shown in FIG. 1C, to expose the surface of the first wiring.

After that, as shown in FIG. 1(d), the second wiring gold pJ
414 to form the first one in the through hole 13.
A connection is made between the wiring 11 and the second wiring (second wiring metal 14).

However, in such a method, the through-hole portion has a structure in which the step corresponding to the thickness of the intermediate insulating film 12 is covered by the upper layer wiring metal (second wiring metal 14). Depending on the cross-sectional shape of the through-hole, wiring resistance may increase in the through-hole portion, and in some cases, the upper layer metal wiring may break.

(Object of the Invention) The present invention has been made in view of the above points, and its object is to prevent an increase in wiring resistance and a disconnection in the through-hole portion.

(Summary of the Invention) The main point of the present invention is that after a second metal is deposited on a first wiring made of a first metal, a portion of the second metal where a through hole is to be formed is blocked by photolithography. After that, an insulating film is deposited on the entire surface with the photoresist used for photolithography remaining, and a buried through hole is formed by removing the insulating film on the second metal using a lift-off method. It's about doing.

(Embodiment) An embodiment of the present invention will be described below with reference to FIG. 2.

In FIG. 2(a), 21 is a first wiring with a thickness of about 0.6 μm made of an aluminum-based metal as a first metal, specifically silicon-containing aluminum or copper-containing aluminum. First, as shown in FIG. 2(b), a second metal 22 of about 7000 A is applied onto the first wiring 21. Steam it with a thick spatter. Here, the metal 22 of the ship 2 is made of a tungsten-based metal, for example, a metal containing 10% titanium with tungsten as a component.

Next, a photoresist 23 is coated on the second metal 22 as shown in FIG. 2(Q).

Thereafter, portions of the second metal 22 where through holes are to be formed are selectively left by photolithography.

To explain this in detail, first, the photoresist 23 is patterned as shown in FIG. 2(d), and then, using the photoresist 23 as a mask, a second
The second metal 2 is etched by etching the second metal 22.
2 is left only in the predetermined portion. At this time, etching is
This is done by plasma etching using a gas containing CF as the main component.

Also, during this etching, a slight side etch is performed to form a photoresist 23 with a length of approximately 0.5 .mu.m as shown in FIG. 2(d).

Note that when a tungsten-based metal is used as the second metal 22, selective etching with aluminum (first wiring 21) can be easily performed by plasma etching using a gas mainly composed of CF.

Subsequently, photoresist 2 used in the photolithography
As shown in FIG. 2(e), an insulating film 25 is formed on the entire surface while leaving the portion 3 intact. Here, the insulating film 25 is sputtered 5i
The film thickness is about 500A, which is a 5i02 film deposited by t-xbutter deposition.

After that, a hydrofluoric acid-based etchant, such as 5H
By etching the insulating film 25 to a thickness of about 1000 Å using F, the photoresist 23 is etched as shown in FIG. 2(f).
Exposing the edges.

Thereafter, the photoresist 23 is removed using an organic solvent such as acetone or ultrasonic cleaning, as shown in FIG. 2(g), and the insulating film 25 thereon is removed. That is, the insulating film 25 on the second metal 22 is removed by the 7-to-7 method. As a result, the second metal 22 remains only in the portion where a through hole is desired to be formed, and a flat surface structure shown in FIG. 2(g) in which a buried through hole is formed is obtained.

(Effects of the Invention) As is clear from the above embodiment, in the method of the present invention, a through-hole is formed using the second metal.

Therefore, since there is no step difference in the through-hole section, even if a stack of wiring over many meters is formed at the same through-hole position, if the upper layer wiring causes a step break, the resistance will increase. ) There will be nothing to do.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a conventional process for forming through-hole portions in multilayer wiring, and FIG. 2 is a sectional view showing an embodiment of the method for manufacturing a semiconductor integrated circuit according to the present invention. 21... First wiring, 22... Second metal, 23.
... Photorenost, 24 ... Eaves, 25 ... Insulating film. Patent Applicant Oki Electric Industry Co., Ltd. Figure 1 Figure 2 23 Procedural Amendment 'Book Opened on October 19, 1989 Shiga, Commissioner of the Japan Patent Office Number of characters: 1, Description of the case 1982 Patent Application No. 52370 2, Title of the invention゛Semiconductor integrated circuit manufacturing method 3, relationship with the case of the person making the amendment Patent applicant (029) Oki Electric Industry Co., Ltd. 4, Agent 5, Date of amendment order Showa year, month, day (voluntary) 6, Subject of amendment Column 7 of the detailed description of the invention in the specification, contents of the amendment as shown in attached sheet 7, contents of the amendment 1) Delete "YUULTRASONIC CLEANING" on page 6 of the specification, line 5. 2) On page 6, line 18, "wiring" is corrected to "through hole."

Claims (2)

[Claims] (1) In the step of forming at least one wiring layer of a semiconductor integrated circuit having a plurality of metal wiring layers, a step of vapor depositing a second metal on the first wiring formed of the first metal; After that, a step of selectively leaving the part where the through hole is to be formed by photolithography of the second metal, and a step of depositing an insulating film on the entire surface while leaving the photoresist used in the photolithography of this step;
A step of etching a part of the insulating film deposited in this step to expose an edge of the photoresist, and then a step of removing the insulating film on the second metal together with the photoresist. A method for manufacturing a semiconductor integrated circuit, characterized by: (2) The first metal is an aluminum metal, the second metal is a tungsten metal, and the insulating film is sputtered SiOx, and the etching of the second metal in photolithography is CF.
By plasma etching using a gas mainly composed of
2. The method of manufacturing a semiconductor integrated circuit according to claim 1, wherein a slight side etching is performed at the same time to form a photoresist canopy.