JPS59114868A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59114868A
JPS59114868A JP57224160A JP22416082A JPS59114868A JP S59114868 A JPS59114868 A JP S59114868A JP 57224160 A JP57224160 A JP 57224160A JP 22416082 A JP22416082 A JP 22416082A JP S59114868 A JPS59114868 A JP S59114868A
Authority
JP
Japan
Prior art keywords
impurity
alloy film
film
semiconductor device
doping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57224160A
Other languages
English (en)
Japanese (ja)
Other versions
JPH053146B2 (enExample
Inventor
Kyoichi Suguro
恭一 須黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57224160A priority Critical patent/JPS59114868A/ja
Publication of JPS59114868A publication Critical patent/JPS59114868A/ja
Publication of JPH053146B2 publication Critical patent/JPH053146B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP57224160A 1982-12-21 1982-12-21 半導体装置の製造方法 Granted JPS59114868A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57224160A JPS59114868A (ja) 1982-12-21 1982-12-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57224160A JPS59114868A (ja) 1982-12-21 1982-12-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59114868A true JPS59114868A (ja) 1984-07-03
JPH053146B2 JPH053146B2 (enExample) 1993-01-14

Family

ID=16809466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57224160A Granted JPS59114868A (ja) 1982-12-21 1982-12-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59114868A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0442930A (ja) * 1990-06-06 1992-02-13 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
WO2002073700A1 (fr) * 2001-03-02 2002-09-19 National Institute For Materials Science Grille et structure cmos et structure mos
US7098120B2 (en) 2003-10-30 2006-08-29 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor devices

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0442930A (ja) * 1990-06-06 1992-02-13 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
WO2002073700A1 (fr) * 2001-03-02 2002-09-19 National Institute For Materials Science Grille et structure cmos et structure mos
US7091569B2 (en) 2001-03-02 2006-08-15 National Institute For Materials Science Gate and CMOS structure and MOS structure
US7098120B2 (en) 2003-10-30 2006-08-29 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor devices

Also Published As

Publication number Publication date
JPH053146B2 (enExample) 1993-01-14

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