JPS59109942A - プログラマブルコントロ−ラ - Google Patents

プログラマブルコントロ−ラ

Info

Publication number
JPS59109942A
JPS59109942A JP57218300A JP21830082A JPS59109942A JP S59109942 A JPS59109942 A JP S59109942A JP 57218300 A JP57218300 A JP 57218300A JP 21830082 A JP21830082 A JP 21830082A JP S59109942 A JPS59109942 A JP S59109942A
Authority
JP
Japan
Prior art keywords
text
transmission
signal
data
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57218300A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0228180B2 (enExample
Inventor
Kazuhide Ashida
和英 芦田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57218300A priority Critical patent/JPS59109942A/ja
Publication of JPS59109942A publication Critical patent/JPS59109942A/ja
Publication of JPH0228180B2 publication Critical patent/JPH0228180B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Programmable Controllers (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
JP57218300A 1982-12-15 1982-12-15 プログラマブルコントロ−ラ Granted JPS59109942A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57218300A JPS59109942A (ja) 1982-12-15 1982-12-15 プログラマブルコントロ−ラ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57218300A JPS59109942A (ja) 1982-12-15 1982-12-15 プログラマブルコントロ−ラ

Publications (2)

Publication Number Publication Date
JPS59109942A true JPS59109942A (ja) 1984-06-25
JPH0228180B2 JPH0228180B2 (enExample) 1990-06-21

Family

ID=16717672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57218300A Granted JPS59109942A (ja) 1982-12-15 1982-12-15 プログラマブルコントロ−ラ

Country Status (1)

Country Link
JP (1) JPS59109942A (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5592931A (en) * 1979-01-02 1980-07-14 Ibm Communication integrating adaptor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5592931A (en) * 1979-01-02 1980-07-14 Ibm Communication integrating adaptor

Also Published As

Publication number Publication date
JPH0228180B2 (enExample) 1990-06-21

Similar Documents

Publication Publication Date Title
US4888691A (en) Method for disk I/O transfer
US8095847B2 (en) Exception condition handling at a channel subsystem in an I/O processing system
EP0166431B1 (en) An information processing apparatus having an instruction prefetch circuit
US7640375B2 (en) DMA controller, method, information processing system, and program for transferring information blocks comprising data and descriptors
EP0529557B1 (en) Apparatus for preventing computer data destructively read out from storage unit
JPS59109942A (ja) プログラマブルコントロ−ラ
JPH0764886A (ja) シリアルインターフェイス装置を有する処理装置
JP2835487B2 (ja) プリンタバッファ
JP3261665B2 (ja) データ転送方法及びデータ処理システム
JP2808757B2 (ja) デバッグ用マイクロプロセッサ
JPS6158041A (ja) マイクロ命令実行制御方式
JP2679440B2 (ja) 情報処理装置
JPS6048778B2 (ja) チャネル制御方式
JPS6238747B2 (enExample)
JPS6253046A (ja) 産業用ロボツトのデ−タ通信装置
JPH0122938B2 (enExample)
JPH0249584B2 (enExample)
JPS60103473A (ja) デ−タ転送制御方式
JPH0152776B2 (enExample)
JPH0783367B2 (ja) デ−タ伝送制御方式
JPH01158554A (ja) Ｄｍａ装置を備えたデータ処理システム
JPS6119145B2 (enExample)
JPS60181863A (ja) デ−タ処理装置
JPH0259829A (ja) マイクロコンピュータ
JPH10136027A (ja) 通信用コントローラ