JPS5897761A - 仮想プロセツサ方式 - Google Patents

仮想プロセツサ方式

Info

Publication number
JPS5897761A
JPS5897761A JP56195926A JP19592681A JPS5897761A JP S5897761 A JPS5897761 A JP S5897761A JP 56195926 A JP56195926 A JP 56195926A JP 19592681 A JP19592681 A JP 19592681A JP S5897761 A JPS5897761 A JP S5897761A
Authority
JP
Japan
Prior art keywords
processor
transaction
transmission
reception
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56195926A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6152509B2 (enExample
Inventor
Atsushi Sugano
淳 菅野
Kenichi Ueda
謙一 上田
Kunio Honda
本田 邦夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56195926A priority Critical patent/JPS5897761A/ja
Publication of JPS5897761A publication Critical patent/JPS5897761A/ja
Publication of JPS6152509B2 publication Critical patent/JPS6152509B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP56195926A 1981-12-04 1981-12-04 仮想プロセツサ方式 Granted JPS5897761A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56195926A JPS5897761A (ja) 1981-12-04 1981-12-04 仮想プロセツサ方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56195926A JPS5897761A (ja) 1981-12-04 1981-12-04 仮想プロセツサ方式

Publications (2)

Publication Number Publication Date
JPS5897761A true JPS5897761A (ja) 1983-06-10
JPS6152509B2 JPS6152509B2 (enExample) 1986-11-13

Family

ID=16349272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56195926A Granted JPS5897761A (ja) 1981-12-04 1981-12-04 仮想プロセツサ方式

Country Status (1)

Country Link
JP (1) JPS5897761A (enExample)

Also Published As

Publication number Publication date
JPS6152509B2 (enExample) 1986-11-13

Similar Documents

Publication Publication Date Title
US4684885A (en) Arrangement for on-line diagnostic testing of an off-line standby processor in a duplicated processor configuration
JPH07219915A (ja) 変換索引バッファクリア命令処理方式
US20120239826A1 (en) System authorizing direct data transfers between memories of several components of that system
KR100321274B1 (ko) 파이프라인형 멀티 프로세서 시스템
CN111447273B (zh) 云处理系统及基于云处理系统的数据处理方法
JPS5897761A (ja) 仮想プロセツサ方式
EP0376003A2 (en) Multiprocessing system with interprocessor communications facility
JP2739830B2 (ja) マルチプロセッサシステム用データ通信装置
JP2655466B2 (ja) パケット交換装置
CN120223781B (zh) Sata存储设备信息传输方法、装置和sata交换机
JP3085730B2 (ja) 複合cpuシステムの並列シミュレーション方式
JPH05324545A (ja) バス制御装置
JPS6318226B2 (enExample)
JPH0315778B2 (enExample)
JPS62135038A (ja) スレ−ブプロセツサのデ−タ通信方式
JPS6049464A (ja) マルチプロセッサ計算機におけるプロセッサ間通信方式
JPS6022264A (ja) デ−タ処理装置
US5463734A (en) Multiprocessing system for exchanging running-state information by encoding the information into an address for transmission between processors
JPH0318958A (ja) マルチプロセッサシステム
JPH06314208A (ja) プロセス間通信方法
JPS62134732A (ja) エラ−ログ解析方式
Scarabottolo et al. Implementation guidelines of a modular general-purpose multi-microcomputer
JPH0822433A (ja) バス制御回路
JPS60239840A (ja) 擬似障害発生装置
JPH03218553A (ja) Dma伝送データ受信装置