JPS5892265A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5892265A
JPS5892265A JP56190354A JP19035481A JPS5892265A JP S5892265 A JPS5892265 A JP S5892265A JP 56190354 A JP56190354 A JP 56190354A JP 19035481 A JP19035481 A JP 19035481A JP S5892265 A JPS5892265 A JP S5892265A
Authority
JP
Japan
Prior art keywords
pattern
gate electrode
gate
insulating film
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56190354A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0353774B2 (enExample
Inventor
Shigeru Okamura
茂 岡村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56190354A priority Critical patent/JPS5892265A/ja
Publication of JPS5892265A publication Critical patent/JPS5892265A/ja
Publication of JPH0353774B2 publication Critical patent/JPH0353774B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Junction Field-Effect Transistors (AREA)
JP56190354A 1981-11-27 1981-11-27 半導体装置の製造方法 Granted JPS5892265A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56190354A JPS5892265A (ja) 1981-11-27 1981-11-27 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56190354A JPS5892265A (ja) 1981-11-27 1981-11-27 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5892265A true JPS5892265A (ja) 1983-06-01
JPH0353774B2 JPH0353774B2 (enExample) 1991-08-16

Family

ID=16256790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56190354A Granted JPS5892265A (ja) 1981-11-27 1981-11-27 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5892265A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60211875A (ja) * 1984-04-05 1985-10-24 Nippon Telegr & Teleph Corp <Ntt> 電界効果トランジスタの製法
US4792531A (en) * 1987-10-05 1988-12-20 Menlo Industries, Inc. Self-aligned gate process
JPH02192733A (ja) * 1989-01-20 1990-07-30 Sumitomo Electric Ind Ltd 電界効果トランジスタの製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5860574A (ja) * 1981-10-06 1983-04-11 Nippon Telegr & Teleph Corp <Ntt> 電界効果トランジスタの製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5860574A (ja) * 1981-10-06 1983-04-11 Nippon Telegr & Teleph Corp <Ntt> 電界効果トランジスタの製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60211875A (ja) * 1984-04-05 1985-10-24 Nippon Telegr & Teleph Corp <Ntt> 電界効果トランジスタの製法
US4792531A (en) * 1987-10-05 1988-12-20 Menlo Industries, Inc. Self-aligned gate process
JPH02192733A (ja) * 1989-01-20 1990-07-30 Sumitomo Electric Ind Ltd 電界効果トランジスタの製造方法

Also Published As

Publication number Publication date
JPH0353774B2 (enExample) 1991-08-16

Similar Documents

Publication Publication Date Title
US4425700A (en) Semiconductor device and method for manufacturing the same
US4392150A (en) MOS Integrated circuit having refractory metal or metal silicide interconnect layer
US4149307A (en) Process for fabricating insulated-gate field-effect transistors with self-aligned contacts
JPS59229876A (ja) シヨツトキ−ゲ−ト型電界効果トランジスタの製造方法
JP2673109B2 (ja) 自己整列型のｔ−ゲートガリウム砒素の金属半導体の電界効果トランジスタの製造方法
JPS6046831B2 (ja) 半導体装置の製造方法
JP2675713B2 (ja) 半導体装置及びその製造方法
JPS5892265A (ja) 半導体装置の製造方法
JP3794915B2 (ja) 半導体装置の製造方法
JPS6292481A (ja) 半導体装置の製造方法
US4170500A (en) Process for forming field dielectric regions in semiconductor structures without encroaching on device regions
JP4541489B2 (ja) 半導体装置及びその製造方法
JPS627165A (ja) 半導体装置の製造方法
JP3436315B2 (ja) Ｍｏｎｏｓ型半導体不揮発性記憶装置の製造方法及び、半導体装置の製造方法
JPH0127589B2 (enExample)
JPH0581183B2 (enExample)
JPH0620080B2 (ja) 半導体素子の製造方法
JPH0529346A (ja) 半導体装置の製造方法
JPS6217391B2 (enExample)
JP2567845B2 (ja) 電界効果トランジスタの製造方法
JPH0645352A (ja) 半導体装置の製造方法
JPH05206461A (ja) 半導体装置の製造方法
JPH08125131A (ja) 半導体装置の製造方法
JPH05335560A (ja) 半導体装置の製造方法
JPS63296277A (ja) 半導体集積回路装置