JPS5888952A - Scビツト重畳伝送方式 - Google Patents

Scビツト重畳伝送方式

Info

Publication number
JPS5888952A
JPS5888952A JP56186501A JP18650181A JPS5888952A JP S5888952 A JPS5888952 A JP S5888952A JP 56186501 A JP56186501 A JP 56186501A JP 18650181 A JP18650181 A JP 18650181A JP S5888952 A JPS5888952 A JP S5888952A
Authority
JP
Japan
Prior art keywords
bit
original signal
bits
cmi
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56186501A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0232827B2 (enExample
Inventor
Masayuki Goto
後藤 昌之
Masakazu Mori
正和 森
Kazuo Yamane
一雄 山根
Yoshiyuki Hongo
本郷 芳之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56186501A priority Critical patent/JPS5888952A/ja
Publication of JPS5888952A publication Critical patent/JPS5888952A/ja
Publication of JPH0232827B2 publication Critical patent/JPH0232827B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • H04L25/491Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes
    • H04L25/4912Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes using CMI or 2-HDB-3 code

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
JP56186501A 1981-11-20 1981-11-20 Scビツト重畳伝送方式 Granted JPS5888952A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56186501A JPS5888952A (ja) 1981-11-20 1981-11-20 Scビツト重畳伝送方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56186501A JPS5888952A (ja) 1981-11-20 1981-11-20 Scビツト重畳伝送方式

Publications (2)

Publication Number Publication Date
JPS5888952A true JPS5888952A (ja) 1983-05-27
JPH0232827B2 JPH0232827B2 (enExample) 1990-07-24

Family

ID=16189590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56186501A Granted JPS5888952A (ja) 1981-11-20 1981-11-20 Scビツト重畳伝送方式

Country Status (1)

Country Link
JP (1) JPS5888952A (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51136224A (en) * 1975-05-21 1976-11-25 Hitachi Ltd Pulse transmission

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51136224A (en) * 1975-05-21 1976-11-25 Hitachi Ltd Pulse transmission

Also Published As

Publication number Publication date
JPH0232827B2 (enExample) 1990-07-24

Similar Documents

Publication Publication Date Title
US4337457A (en) Method for the serial transmission of binary data and devices for its implementation
IE45458B1 (en) Miller-encoded message decoder
US4232388A (en) Method and means for encoding and decoding digital data
US4325053A (en) Method and a circuit for decoding a C.M.I. encoded binary signal
US4153814A (en) Transition coding method for synchronous binary information and encoder and decoder employing the method
US4928289A (en) Apparatus and method for binary data transmission
RU2168270C2 (ru) Способ кодирования цифровых сигналов и устройство для его осуществления
JPS5888952A (ja) Scビツト重畳伝送方式
EP0208558B1 (en) A cmi signal transmission system
US4809301A (en) Detection apparatus for bi-phase signals
JPS59123337A (ja) フレ−ム同期方式
JPH08186554A (ja) 時分割多重伝送装置および復号化回路
JPH0123016B2 (enExample)
JPS596542B2 (ja) パルス受信回路
JPH0562851B2 (enExample)
JPH0210619B2 (enExample)
JPS61141233A (ja) 位相補正回路
JPS6016147B2 (ja) パルス伝送方式
KR100368767B1 (ko) 이진 부호화방법 및 장치
JPH03187542A (ja) 同期回路
JP3150071B2 (ja) データ伝送装置
JPS61131655A (ja) サ−ビス符号插入制御方式
JPS5917749A (ja) デイジタル信号伝送方式
JPS59163938A (ja) 符号誤り検出方式
JPS5869151A (ja) 復号化回路