JPS5843545A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5843545A JPS5843545A JP56141688A JP14168881A JPS5843545A JP S5843545 A JPS5843545 A JP S5843545A JP 56141688 A JP56141688 A JP 56141688A JP 14168881 A JP14168881 A JP 14168881A JP S5843545 A JPS5843545 A JP S5843545A
- Authority
- JP
- Japan
- Prior art keywords
- polyimide resin
- film
- irradiated
- resin
- photosensitive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
- H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Abstract
Description
【発明の詳細な説明】
本発明は新規な方法でｇｉｉｌｆｉ蔽膜會形成した半導
体装置に関するもの′！：ある。 −
一般に５．トランジスタ咎が形成され九半導体素子はセ
ラミック封止体、樹脂封止体などの封止体で封止される
。こ朴らの封止体に紘つ２ニウムやトリク４勢の不純物
が含まれている。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device in which a GIILFI film is formed using a novel method! :be. - Generally 5. After the transistor is formed, the semiconductor element is sealed with a sealing body such as a ceramic sealing body or a resin sealing body. Koboku et al.'s sealed body contains impurities such as Hirotsu 2nium and Toriku 4 group.
これらの不純物は、たとえば、１６ｔｈ Ａｎ４ｃａｌ
Ｐｒｔｓａａｅｄイー９１ ｏｆ １９７８１ｎｔａｒ
ｎａｔｉｔｎｗｘｌ Ｒａｌ砺１ｉｔｙ Ｐｋｙａｉｅ
ａ ｌｉ＠ｇｓａａｉｍ（１９７８）ｐ３３に述べられ
ているように、＃１ｉｆｆｉ放出し半導体素子内、に形
成されたダイナミックメモリ回路の誤動作・（ソフトエ
ラと呼ぶ）の要因となることが知られている。These impurities are, for example, 16th An4cal
PrtsaaedE91 of 19781ntar
natitnwxl Ralto1ity Pkyaie
As stated in ``Ali@gsaaim'' (1978) p. 33, it is known that #1iffi is emitted and causes a malfunction (referred to as a soft error) of a dynamic memory circuit formed in a semiconductor element.
このソフトエラを防止する方法の一つとして、半導体素
子の表面にａ！１蓮蔽膜を設ける方法が知られている。One way to prevent this soft error is to apply a! 1. A method of providing a lotus shield is known.
ａｌｌ遮蔽膜は、５０Ｐ以上の厚膜形成が可能であるこ
と、半導体素子の封止工程に耐えるだけの耐熱性を有す
ること、Ｃ線発生源のウラニウムやトリウムおよび素子
に悪影響を及ぼすナトリウ１など？Ｔ＃ＩＩ！１′−有
量が讐めて小さ“こと・な箭特性會有している必要があ
る。これらの特性を満足する材料として、ポリイミド系
樹脂が好んで用ｉられている６１／ｂ
ポリ信ド士樹脂管“線遮蔽膜に用“た半導体素子とし１
２−
は、第１図に示すように、半導体基体１ｔ−パッケージ
の所定の位置にグイボンデイングムさらに外部接続のた
めにボンデ４ングワイヤ２門接着した徴、ポリイミド系
樹脂膜１會ポツテイングで形成１つ匹で、第２ｍのよう
に、セラミック封止体で気密封止したものが広く製造さ
れている。この場合、通常、ボリイぐド系樹脂膜３は第
１図に示しであるように、半導体基体の全面ｔ−扱って
おシ、ボンディングワイヤの一部にもかかつている。第
２図で示し九ような気密封止の場合はこの構造で全く問
題ないが、第５図で示すような樹脂封止した場合は、ボ
ンディングワイヤにかかつているポリインド系・１・
樹脂と封止樹脂の界面１０の部分でせん断応力が働き、
ボンディングワイヤ切れを生じて素子、の信Ｓｔ性が著
しく低下する。The all-shielding film must be able to form a thick film of 50P or more, have enough heat resistance to withstand the sealing process of semiconductor elements, and must not contain uranium or thorium, which is the source of C-rays, and sodium 1, which has a negative effect on the elements. ? T#II! 61/b Polyimide resin is preferably used as a material that satisfies these properties. Semiconductor element using resin tube as a radiation shielding film 1
2-, as shown in FIG. 1, two bonding wires are bonded to a predetermined position of the semiconductor substrate 1t-package for external connection, and a polyimide resin film 1 is formed by potting 1. Of these, those hermetically sealed with a ceramic sealing body, such as No. 2m, are widely manufactured. In this case, as shown in FIG. 1, the volatile resin film 3 usually covers the entire surface of the semiconductor substrate and also covers a portion of the bonding wire. In the case of airtight sealing as shown in Fig. 2, there is no problem with this structure, but in the case of resin sealing as shown in Fig. 5, the sealing may be caused by the polyindo-based resin covering the bonding wire. Shear stress acts at the interface 10 of the stopper resin,
This causes the bonding wire to break, and the reliability of the device is significantly reduced.
セラミック封止のような気密封止鉱製造コストが高く、
樹脂封止への移行が必然となっている。仁のために社、
前述のワイヤ切れｔ防止する手段が必要である。The production cost of hermetically sealed minerals such as ceramic seals is high;
A shift to resin sealing has become inevitable. Society for Jin,
A means to prevent the aforementioned wire breakage is required.
この問題を回避するためには、第４図で示すように少な
くともポンディングパッド部管除く領域にあらかじめポ
リイミド系樹脂の膜を形成しておき、ついでボンディン
グワイヤを接続することによタボンデイングワイヤにポ
リイミドがかからないようにする必賛宰６る。In order to avoid this problem, as shown in Fig. 4, a film of polyimide resin is formed in advance at least on the area other than the bonding pad tube, and then the bonding wire is connected to the bonding wire. It is essential to prevent polyimide from coming into contact with the product.
ポンディングパッド部を除く領域にポリイミド系樹脂の
膜を形成する方法として、半導体素子を形成したシリコ
ン・ウェーハにポリイミドを塗布し不要部をエツチング
で除去する方法が広く用いられている。このポリイミド
系樹脂膜の形成方法をさらに詳細に説明すると、
（１） シリコン・つ千−ノ）にポリイミド系樹脂の
前駆体の溶液′ｉｔ１
を全面に均−塗置し、プリベークする、パ１１
（２） ネガ型７オトレレストを全面塗布しプリベー
クする、（３）轍路的に残すべきポリイミド展の部分に
相当する個所のフォトレジストに光が当るようなフォト
マスク管使用し紫外光を照射する、
（４） フォトレジストの現像全行なう、（５）
耐エツチング性を上げるために７オトレジスト會ポスト
ベークする、
（６）ヒドラジン系エッチャントなどでポリイミド上エ
ツチングするζ
（７） フォトレジスＩｔ剥離する、（８）ポリイミ
ド系樹脂を熱処理する、という煩雑な工程から成ってお
り、より簡易な形成方法が望まれている。A widely used method for forming a polyimide resin film in areas other than the bonding pad portion is to apply polyimide to a silicon wafer on which semiconductor elements are formed and to remove unnecessary portions by etching. The method for forming this polyimide resin film is explained in more detail: (1) A solution of a polyimide resin precursor 'it1 is uniformly applied to the entire surface of silicone resin, and prebaked. (2) Apply negative type 7 Otorerest to the entire surface and pre-bake. (3) Irradiate ultraviolet light using a photomask tube that allows light to hit the photoresist in the areas corresponding to the areas of polyimide that should be left as ruts. , (4) Perform all photoresist development, (5)
The complicated process of 7 post-baking the photoresist to improve etching resistance, (6) etching the polyimide with a hydrazine etchant, (7) peeling off the photoresist, and (8) heat-treating the polyimide resin. Therefore, a simpler method of formation is desired.
本発明Ｆｉこのような現状を鑑みてなされたものでＩ、
そ１
。The present invention was made in view of the current situation.
Part 1
.
の目的は、簡易な方法による樹脂封止可能なａｍ［蔽用
ポリイミド展の形成方法Ｏ提供にある。The purpose of the present invention is to provide a method for forming a polyimide film for resin sealing using a simple method.
すなわち、本発明は、半導体素子表面に、ボンディング
／くラド部を除く領域にα線遮蔽用ポリイミド系樹脂膜
を設けた、樹脂封止してなる半導体装置において、該ポ
リインド系樹脂膜が感光性ポリイミド系樹脂を用いて形
成されたものであることｔ％徴とする半導体装置に関す
るものでらる。That is, the present invention provides a resin-sealed semiconductor device in which a polyimide resin film for α-ray shielding is provided on the surface of a semiconductor element in a region other than a bonding/cladding portion, and the polyimide resin film is photosensitive. The present invention relates to a semiconductor device characterized in that it is formed using a polyimide resin.
感光性ポリイミド系樹脂とは、ポリインド系樹脂または
その前駆体に感光基を導入したもので、その樹脂に光（
通常、紫外線）を照射テることによシ、光照射部と非照
射部で特定の溶媒に対する溶解性に差を生ずるものであ
る。・ ・ポリイミド系樹脂の前駆体と蝶、テトラ
カルポジ酸二無水物とジアミンとを反応させる２＞Ｓま
たはこの系にさらにトリアミン、テトラアミン、ジアミ
ノモノアミド、トリカルボン酸−無水物、ジイソシアネ
ートまたはその他の共重合可能な化合物から選ばれた化
合物を共重合成分として共存させて反応させて得たポリ
アミド酸系樹脂で、これらの樹脂を熱処理するとポリイ
ミド系樹脂となる。半導体装置のα線迩蔽膜として用６
る場合、通常、耐熱性が必要であ広芳香族ポリイミド系
樹脂が好ましく用いられる。Photosensitive polyimide resin is a polyimide resin or its precursor with a photosensitive group introduced into it, and the resin is exposed to light (
By irradiating the material with ultraviolet rays (usually ultraviolet rays), a difference in solubility in a particular solvent occurs between the irradiated area and the non-irradiated area.・ ・Reacting a polyimide resin precursor with butterfly, tetracarposi dianhydride, and diamine 2>S or this system can be further copolymerized with triamine, tetraamine, diamino monoamide, tricarboxylic acid anhydride, diisocyanate, or other copolymerization. It is a polyamic acid-based resin obtained by coexisting and reacting a compound selected from the following as a copolymerization component, and when these resins are heat-treated, they become a polyimide-based resin. Used as an α-ray shielding film for semiconductor devices 6
In this case, heat resistance is usually required, and broadly aromatic polyimide resins are preferably used.
テトラカルボン酸二無水物の例としては、ピロメリット
酸二無水物、ベンゾフェノンテトラカルポン鐵二無水物
、ビフェニルテトラカルボン酸二無水物中ナフタレンテ
トラカルボン酸二無水物などの芳香族テトラカルボン酸
二無水物が挙げられるが、これらに限定されるもので鉱
ない。Examples of tetracarboxylic dianhydrides include aromatic tetracarboxylic dianhydrides such as pyromellitic dianhydride, benzophenonetetracarboxylic dianhydride, naphthalenetetracarboxylic dianhydride in biphenyltetracarboxylic dianhydride; Examples include, but are not limited to, anhydrides.
ジアミンの例としては、シア５ノジフエニルエーテル、
シフ２ノジフエニルスルホン、ジアミノジフェニルメタ
ン、ビス（３−アミノプロピル）テトラメテルジシ四キ
ナンなどが挙けられるが、これらに限定されるもので蝶
ない。Examples of diamines include cyanodiphenyl ether,
Examples include, but are not limited to, Schiff-2-diphenyl sulfone, diaminodiphenylmethane, bis(3-aminopropyl)tetramethyldisi-tetraquinane, and the like.
テトラカルボン酸二無水物、ジアミノと共重合可能な化
合物の例としては、３・４・４） −）リアミノジフェ
ニルエーテ、′１
ル、３−モノアミド−４・ａ’−１’ｌミノジフエニル
エーテル、３・４・３′・４′−テトラアミノジフェニ
ルエーテル、トリノリット酸無水物塩化物、４・４′−
ジフェニルエーテルジイソシアネートなどが例として挙
げられるが、これらに限定されるものではない。Examples of compounds copolymerizable with tetracarboxylic dianhydride and diamino include 3, 4, 4) -) riaminodiphenyl ether, '1', 3-monoamide-4, a'-1'l minodiphenyl. Ether, 3,4,3',4'-tetraaminodiphenyl ether, trinolitic anhydride chloride, 4,4'-
Examples include, but are not limited to, diphenyl ether diisocyanate.
感光基とは、光（ｉ常、紫外光）１照射した時、ポリイ
ンド系樹脂またはその前駆体に架橋構造を形成ＬＡｑ＃
定の溶剤への溶解性を低下させる効果のあるものである
。感光基の例として、メタクリル基、アクリル基、アリ
ル基、メタリル幕シンナメート基、アジド基などが挙げ
られる臥・これらに紘限定されない。A photosensitive group is a group that forms a crosslinked structure on a polyindo resin or its precursor when irradiated with light (usually ultraviolet light).
It has the effect of reducing the solubility in certain solvents. Examples of the photosensitive group include, but are not limited to, a methacrylic group, an acrylic group, an allyl group, a methacrylic cinnamate group, an azide group, and the like.
ポリイミド系樹脂の前駆体に感光基を導入する方法とし
ては、ポリイミド系樹脂′め前駆体の溶液に、ビスアジ
ド化合物、ジメチルアミノエチルメタクリレート、アリ
ルアンンなどを混合する方法が一例として挙けられる。An example of a method for introducing a photosensitive group into a polyimide resin precursor is a method of mixing a bisazide compound, dimethylaminoethyl methacrylate, allyl anne, etc. into a solution of the polyimide resin precursor.
ｌｉｓ
感光性ポリインド前駆体は、通常、溶媒中で合成または
調合オペ溶液の形で実用に供せられる二また、感□光性
ポリイ、′
ミド１駆体の溶液には、通常、感度管上げるために−
ｔｉ−ズ・ケトンのような光開始剤が加えられている。lis The photosensitive polyimide precursor is usually synthesized in a solvent or put into practical use in the form of a compounding operation solution. For-
A photoinitiator such as a ti-z ketone is added.
半導体素子へのポリイミド系樹脂膜の形成は次？工程で
行なわれる。What's next for forming polyimide resin films on semiconductor devices? It is done in the process.
の溶液を全面に均一塗布ムプリベークする、（２）最終
的に残すべきポリイミド膜の部分に光が当るようなフォ
トマスクを使用し、紫外線管照射する、（３） 現像す
る、
（４）熱処理金する。(2) Use a photomask that allows the light to hit the part of the polyimide film that is to be left in the final stage, and irradiate it with an ultraviolet tube. (3) Develop it. (4) Heat-treat the gold. do.
本工程は前述の従前の工程に比較して著しく合理化され
ておｐ１大幅なコストダウンに結びり〈。This process is significantly more streamlined than the previous process mentioned above, leading to significant cost reductions.
次に実施例に基づいて本発＠會説明する。Next, the present invention will be explained based on an example.
実施例 １゜
ペンゾフエノンテト多カルボン酸二無水物と、ジアンノ
ジフェニルエーテルから合成されたポＩＪイ叱ド前駆体
のＮ−メチル−２−ピロリドン溶液に、ジメチルアミノ
エチルメタクリレート及びミヒラーズ・ケ）ｙ？添加し
て感光性ポリイミド前駆体溶液會えた。Example 1 Into an N-methyl-2-pyrrolidone solution of a polycarboxylic acid dianhydride and diannodiphenyl ether, dimethylaminoethyl methacrylate and Michlers Ke) were added. Y? A photosensitive polyimide precursor solution was prepared.
メモリ回路管形成したシリコン・ウェー／１に、スピン
ナで、 ゛ 、 ・
皺感光性でリイ゛７．ド前駆体溶液管塗布り、、ａｏｃ
ｉ時間乾燥した。ポンディングパッド部および＊ｓｍ蔽
膜會形成する必要のない部分に光が尚らなｉような７オ
トマスクを使用し、超高圧水銀灯管用＾て紫外線管照射
した。現像液で現像して、ポンディングパッド部および
ａ線遮蔽膜を形成する必要のない部分の膜−除去ヒた・
ついで・熱処理して・ボンディング・（ツ）ｍｌＫ＃１
ｌｉｏな％Ａ−線遮蔽Ｗ＆を形成した。シリコン・ウェ
ーハからチップｔｇ：Ｊ多出し、リードフレームにダイ
ボンデインクし九。ボンディングレイヤを接続し、第３
図のように樹脂封止した。7. Apply a wrinkle photosensitive layer to the silicon wafer 1 on which the memory circuit tube was formed using a spinner. Precursor solution tube application, aoc
Dry for i hours. The bonding pad area and the areas where it was not necessary to form the *sm shielding film were irradiated with ultraviolet rays using an ultra-high pressure mercury lamp tube, using a type 7 Otomask that does not have sufficient light. Develop with a developer to remove the bonding pad and areas where it is not necessary to form the A-ray shielding film.
Then, heat treatment, bonding, (tsu) mlK#1
io% A-ray shielding W& was formed. A large number of chips (tg:J) were extracted from a silicon wafer and die bonded and inked onto a lead frame. Connect the bonding layer and
It was sealed with resin as shown in the figure.
ボンディングワイヤの切断もなく、かつ、充分なｇ線遮
蔽効果があった。There was no cutting of the bonding wire, and there was a sufficient g-ray shielding effect.
第１図Ｆｉα！Ｉ！１蔽膜を半導体基体上にポツティン
グ法により形成した半導体基体の断呵図、第２図はセラ
ンツク封止した半導体装置の断面図、第３図紘本警明の
方法により樹脂封止した半導体装置の一面図、第４因略
ボ／ディングパッド部を除く部分にａｌＩｍ蔽膜を形成
し本手導体基体の断頁図、第５図はボッティング法によ
り＝Ｉｉ；−展！形成し樹脂封止１・・・・・・半導体
基体、２−−−−−ボン４シイグワイヤ、３．３３・・
・・・・＃線遮蔽ｌＩ（ポリイミド）、４，５・・・・
−セラ、ミック封止体、６・・・・・・シールガラス、
？−−−−−−リード、８−−−−樹脂封止体。
゛色
１１団
ｖ；３ｒｍ
３
直
″ １畑
富２０Figure 1 Fiα! I! 1 is a cross-sectional view of a semiconductor substrate formed by a potting method on a semiconductor substrate, FIG. 2 is a cross-sectional view of a semiconductor device sealed with a cellulose sealant, and FIG. 3 is a cross-sectional view of a semiconductor device sealed with a resin using the method of Noriaki Hiromoto. Figure 5 is a cross-sectional view of the main conductor substrate with an AlIm shielding film formed on the portion excluding the boarding pad portion, and Figure 5 is a cross-sectional view of the main conductor substrate formed by the botting method. Formed and resin sealed 1...Semiconductor base, 2-----bond 4 wire, 3.33...
...#ray shielding lI (polyimide), 4,5...
-Cera, Mic sealing body, 6... Seal glass,
? --------Lead, 8---Resin sealing body.゛Color 11 group v; 3rm 3 straight'' 1 Hatatomi 20
Claims (1)
にａ線遮蔽膜用ポリイミド系樹脂膜を設けた、樹脂封止
してなる半導体装置において、該ポリイミド系樹脂膜が
感光性ポリイミド系樹脂を用いて形成され良もの、であ
ること會特徴とする半導体装置。 、In a resin-sealed semiconductor device in which a polyimide resin film for an A-ray shielding film is provided on the surface of the semiconductor element, the polyimide resin film is formed using a photosensitive polyimide resin. A semiconductor device characterized by being well-formed and of good quality.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56141688A JPS5843545A (en) | 1981-09-10 | 1981-09-10 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56141688A JPS5843545A (en) | 1981-09-10 | 1981-09-10 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5843545A true JPS5843545A (en) | 1983-03-14 |
Family
ID=15297899
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56141688A Pending JPS5843545A (en) | 1981-09-10 | 1981-09-10 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5843545A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5045918A (en) * | 1986-12-19 | 1991-09-03 | North American Philips Corp. | Semiconductor device with reduced packaging stress |
| US5171716A (en) * | 1986-12-19 | 1992-12-15 | North American Philips Corp. | Method of manufacturing semiconductor device with reduced packaging stress |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5568659A (en) * | 1978-11-20 | 1980-05-23 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
-
1981
- 1981-09-10 JP JP56141688A patent/JPS5843545A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5568659A (en) * | 1978-11-20 | 1980-05-23 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5045918A (en) * | 1986-12-19 | 1991-09-03 | North American Philips Corp. | Semiconductor device with reduced packaging stress |
| US5171716A (en) * | 1986-12-19 | 1992-12-15 | North American Philips Corp. | Method of manufacturing semiconductor device with reduced packaging stress |
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