JPS5837740A - バツフアメモリ制御方式 - Google Patents

バツフアメモリ制御方式

Info

Publication number
JPS5837740A
JPS5837740A JP56136483A JP13648381A JPS5837740A JP S5837740 A JPS5837740 A JP S5837740A JP 56136483 A JP56136483 A JP 56136483A JP 13648381 A JP13648381 A JP 13648381A JP S5837740 A JPS5837740 A JP S5837740A
Authority
JP
Japan
Prior art keywords
information
write
buffer memory
memory
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56136483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6327731B2 (enrdf_load_stackoverflow
Inventor
Kazumi Numazawa
沼沢　一美
Kazuo Imai
和雄 今井
Toshiro Mizuno
水野　俊郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56136483A priority Critical patent/JPS5837740A/ja
Publication of JPS5837740A publication Critical patent/JPS5837740A/ja
Publication of JPS6327731B2 publication Critical patent/JPS6327731B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)
JP56136483A 1981-08-31 1981-08-31 バツフアメモリ制御方式 Granted JPS5837740A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56136483A JPS5837740A (ja) 1981-08-31 1981-08-31 バツフアメモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56136483A JPS5837740A (ja) 1981-08-31 1981-08-31 バツフアメモリ制御方式

Publications (2)

Publication Number Publication Date
JPS5837740A true JPS5837740A (ja) 1983-03-05
JPS6327731B2 JPS6327731B2 (enrdf_load_stackoverflow) 1988-06-06

Family

ID=15176192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56136483A Granted JPS5837740A (ja) 1981-08-31 1981-08-31 バツフアメモリ制御方式

Country Status (1)

Country Link
JP (1) JPS5837740A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60156159A (ja) * 1984-01-25 1985-08-16 Hitachi Ltd 磁気バブルメモリ装置
JPH01315822A (ja) * 1988-06-15 1989-12-20 Nec Corp ランダムアクセスｆｉｆｏメモリ

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5166742A (ja) * 1974-12-06 1976-06-09 Hitachi Ltd Deetabatsufuaseigyosochi
JPS5585158A (en) * 1978-12-21 1980-06-26 Nec Corp Constitution for buffer memory of data exchanger

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5166742A (ja) * 1974-12-06 1976-06-09 Hitachi Ltd Deetabatsufuaseigyosochi
JPS5585158A (en) * 1978-12-21 1980-06-26 Nec Corp Constitution for buffer memory of data exchanger

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60156159A (ja) * 1984-01-25 1985-08-16 Hitachi Ltd 磁気バブルメモリ装置
JPH01315822A (ja) * 1988-06-15 1989-12-20 Nec Corp ランダムアクセスｆｉｆｏメモリ

Also Published As

Publication number Publication date
JPS6327731B2 (enrdf_load_stackoverflow) 1988-06-06

Similar Documents

Publication Publication Date Title
US6892273B1 (en) Method and apparatus for storing mask values in a content addressable memory (CAM) device
US3601809A (en) Addressable list memory systems
WO1999022302B1 (en) Buffering data that flows between buses operating at different frequencies
US7085880B2 (en) Method and apparatus for address FIFO for high-bandwidth command/address busses in digital storage system
US6295534B1 (en) Apparatus for maintaining an ordered list
JPS6155688B2 (enrdf_load_stackoverflow)
US10216645B2 (en) Memory data transfer method and system
US6393515B1 (en) Multi-stream associative memory architecture for computer telephony
JPH02503248A (ja) Ｒｏｍデータワードの更新を可能にするための回路システム
EP0367995B1 (en) Vector data transfer controller
JPS5837740A (ja) バツフアメモリ制御方式
US9430379B1 (en) Dynamic random access memory controller
US7404049B2 (en) Method and system for managing address bits during buffered program operations in a memory device
JPS619766A (ja) デ−タ転送装置
JPS6054056A (ja) ビットデ−タ書込メモリインタ−フェ−ス回路
JPH0833869B2 (ja) データ処理装置
JPH04266140A (ja) アドレス変換バッファ装置
JPS616746A (ja) 部分書込み制御方式
JPS61246848A (ja) 動作履歴記憶回路
JPH10275113A (ja) 記憶装置
JPS6019810B2 (ja) バッファメモリ制御方式
JPH05128006A (ja) 仮想計算機システム
JPS59157886A (ja) メモリ制御方式
JPS62209792A (ja) Ｆｉｆｏ回路
WO2004040579A1 (en) Smart card write-only register