JPS58223364A - 半導体スイツチ素子 - Google Patents

半導体スイツチ素子

Info

Publication number
JPS58223364A
JPS58223364A JP57106459A JP10645982A JPS58223364A JP S58223364 A JPS58223364 A JP S58223364A JP 57106459 A JP57106459 A JP 57106459A JP 10645982 A JP10645982 A JP 10645982A JP S58223364 A JPS58223364 A JP S58223364A
Authority
JP
Japan
Prior art keywords
switch
base
region
emitter
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57106459A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0381309B2 (enExample
Inventor
Yuji Komatsu
裕司 小松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57106459A priority Critical patent/JPS58223364A/ja
Publication of JPS58223364A publication Critical patent/JPS58223364A/ja
Publication of JPH0381309B2 publication Critical patent/JPH0381309B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/641—Combinations of only vertical BJTs

Landscapes

  • Electronic Switches (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
JP57106459A 1982-06-21 1982-06-21 半導体スイツチ素子 Granted JPS58223364A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57106459A JPS58223364A (ja) 1982-06-21 1982-06-21 半導体スイツチ素子

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57106459A JPS58223364A (ja) 1982-06-21 1982-06-21 半導体スイツチ素子

Publications (2)

Publication Number Publication Date
JPS58223364A true JPS58223364A (ja) 1983-12-24
JPH0381309B2 JPH0381309B2 (enExample) 1991-12-27

Family

ID=14434166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57106459A Granted JPS58223364A (ja) 1982-06-21 1982-06-21 半導体スイツチ素子

Country Status (1)

Country Link
JP (1) JPS58223364A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019512885A (ja) * 2016-03-15 2019-05-16 アイディール パワー インコーポレイテッド 偶発的なターンオンを防止する受動素子を備える二重ベース接続バイポーラトランジスタ

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5198986A (enExample) * 1975-02-26 1976-08-31
JPS5558546A (en) * 1978-10-24 1980-05-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor logic circuit device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5198986A (enExample) * 1975-02-26 1976-08-31
JPS5558546A (en) * 1978-10-24 1980-05-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor logic circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019512885A (ja) * 2016-03-15 2019-05-16 アイディール パワー インコーポレイテッド 偶発的なターンオンを防止する受動素子を備える二重ベース接続バイポーラトランジスタ

Also Published As

Publication number Publication date
JPH0381309B2 (enExample) 1991-12-27

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