JPS58181319A - タイミング発生回路 - Google Patents

タイミング発生回路

Info

Publication number
JPS58181319A
JPS58181319A JP57063830A JP6383082A JPS58181319A JP S58181319 A JPS58181319 A JP S58181319A JP 57063830 A JP57063830 A JP 57063830A JP 6383082 A JP6383082 A JP 6383082A JP S58181319 A JPS58181319 A JP S58181319A
Authority
JP
Japan
Prior art keywords
voltage
gate
pulse
node
ground potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57063830A
Other languages
English (en)
Japanese (ja)
Inventor
Tetsuo Matsumoto
哲郎 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57063830A priority Critical patent/JPS58181319A/ja
Priority to FR8302546A priority patent/FR2525413B1/fr
Priority to GB08308335A priority patent/GB2118795A/en
Priority to KR1019830001256A priority patent/KR840004330A/ko
Priority to IT20514/83A priority patent/IT1194195B/it
Priority to DE3314002A priority patent/DE3314002A1/de
Publication of JPS58181319A publication Critical patent/JPS58181319A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01728Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
    • H03K19/01735Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by bootstrapping, i.e. by positive feed-back
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/023Shaping pulses by amplifying using field effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration
    • H03K5/05Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Dram (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
JP57063830A 1982-04-19 1982-04-19 タイミング発生回路 Pending JPS58181319A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP57063830A JPS58181319A (ja) 1982-04-19 1982-04-19 タイミング発生回路
FR8302546A FR2525413B1 (fr) 1982-04-19 1983-02-17 Generateur d'impulsions de cadencement et memoire dynamique utilisant ce generateur
GB08308335A GB2118795A (en) 1982-04-19 1983-03-25 A timing pulse generator and a dynamic memory using the generator
KR1019830001256A KR840004330A (ko) 1982-04-19 1983-03-28 타이밍펄스(timing pulse)발생기와 그것을 사용한 다이나믹(dynamic)형 기억장치
IT20514/83A IT1194195B (it) 1982-04-19 1983-04-08 Generatore di impulsi di temporizzazione e memoria dinamica impiegante tale generatore
DE3314002A DE3314002A1 (de) 1982-04-19 1983-04-18 Taktgeber und damit arbeitender dynamischer speicher

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57063830A JPS58181319A (ja) 1982-04-19 1982-04-19 タイミング発生回路

Publications (1)

Publication Number Publication Date
JPS58181319A true JPS58181319A (ja) 1983-10-24

Family

ID=13240657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57063830A Pending JPS58181319A (ja) 1982-04-19 1982-04-19 タイミング発生回路

Country Status (6)

Country Link
JP (1) JPS58181319A (fr)
KR (1) KR840004330A (fr)
DE (1) DE3314002A1 (fr)
FR (1) FR2525413B1 (fr)
GB (1) GB2118795A (fr)
IT (1) IT1194195B (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07130175A (ja) * 1993-09-10 1995-05-19 Toshiba Corp 半導体記憶装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631267A (en) * 1970-06-18 1971-12-28 North American Rockwell Bootstrap driver with feedback control circuit
DE2132814A1 (de) * 1971-07-01 1973-01-18 Siemens Ag Schaltungsanordnung aus mos-transistoren zur verzoegerung der rueckflanke von am eingang zugefuehrten steuerimpulsen
US3898479A (en) * 1973-03-01 1975-08-05 Mostek Corp Low power, high speed, high output voltage fet delay-inverter stage
US4061933A (en) * 1975-12-29 1977-12-06 Mostek Corporation Clock generator and delay stage
DE2816980C3 (de) * 1978-04-19 1980-10-09 Ibm Deutschland Gmbh, 7000 Stuttgart FET-Treiberschaltung mit kurzen Schaltzeiten
JPS5513566A (en) * 1978-07-17 1980-01-30 Hitachi Ltd Mis field effect semiconductor circuit device
DE2935121A1 (de) * 1978-09-07 1980-03-27 Texas Instruments Inc Schreib/lese-halbleiterspeicher
JPS5648715A (en) * 1979-09-28 1981-05-02 Nec Corp Delay signal generating circuit
JPS57186354A (en) * 1981-05-13 1982-11-16 Hitachi Ltd Semiconductor memory storage and manufacture thereof
DE3144513C1 (de) * 1981-11-09 1983-05-05 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung in MOS-Technik zur Erzeugung eines Nachfolgetaktes aus mindestens einem Setztakt

Also Published As

Publication number Publication date
KR840004330A (ko) 1984-10-10
IT1194195B (it) 1988-09-14
FR2525413A1 (fr) 1983-10-21
IT8320514A0 (it) 1983-04-08
GB8308335D0 (en) 1983-05-05
GB2118795A (en) 1983-11-02
FR2525413B1 (fr) 1989-06-02
DE3314002A1 (de) 1983-11-03

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