JPS5817664A - 混成集積回路装置 - Google Patents

混成集積回路装置

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Publication number
JPS5817664A
JPS5817664A JP56115073A JP11507381A JPS5817664A JP S5817664 A JPS5817664 A JP S5817664A JP 56115073 A JP56115073 A JP 56115073A JP 11507381 A JP11507381 A JP 11507381A JP S5817664 A JPS5817664 A JP S5817664A
Authority
JP
Japan
Prior art keywords
element mounting
mounting region
wiring substrate
groove
heating element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56115073A
Other languages
English (en)
Inventor
Tsuneo Endo
恒雄 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56115073A priority Critical patent/JPS5817664A/ja
Publication of JPS5817664A publication Critical patent/JPS5817664A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は混成集積回路装置に関する。
混成集積回路装置（）・イブリッドＩＣ）Ｋあっては発
熱量の多い抵抗あるいは能動素子を組み込むことが多い
。この場合、温度依存性の高い素子（温度依存素子）は
安定して動作させるために前記発熱量の大きい素子（発
熱素子）の熱の影響を紡ぐ必要があり、従来はつぎのよ
うな構造を採用している。
川　発熱素子から温度依存素子を遠く離すよ５にレイア
ウトする。
（２）発熱素子をディスクリート部品とし、外付にする
か、または影響のない位置に半田付する。
（３）第１図に示すように、パワートランジスタのよう
な発熱素子１を搭載した基板２と、小信号トランジスタ
岬の温度依存素子３を搭載した配線基板４を分離し、か
つこれらの基板２．４を接着剤５を介して放熱板６に取
り付け、所望電極部間をワイヤ７で接続している。この
構造では、発熱素子１と温度依存素子３との間に空気が
介在するようにして熱の伝導を紡ぐ空気アイソレージ曹
ン構造を採用している。
しかし、これら従来の構造は熱の影響を防ぐために、発
熱素子と温度依存素子とを遠く離すために、高集積度化
が図れない欠点があるとともに、その組立に手間が掛る
等の難点がある。
したがって、本発明の目的は、組立が容易でかつ高集積
度化が図れる構造の混成集積回路装置を提供するととに
ある。
このような目的を達成するために本発明は、絶縁性の配
線基板の表面に温度依存性の高い温度依存素子と、発熱
量の大きい発熱素子を搭載してなる混成集積回路装置に
おいて、前記発熱素子取付領域と温度依存素子取付領域
との間の絶縁性の配線基板の裏面に両領域を区画するよ
うな方向ｋｍ在する溝を設けておくものであって、以下
実施例により本発明を説明する。
第２図は本発明の一実施例によるハイブリッドＩＣの断
面図である。このハイブリッドＩＣ８は絶縁性のセラミ
ック基板９の主面（表［）に配線層ｌＯを形成した１枚
の絶縁性配線基板ｌｌ上Ｋ、発熱素子１および温度依存
素子３を取り付けている。配線基板１１の発熱素子取付
領域１２と温度依存素子取付領域１３との間の配線基板
１１の裏面は、第３図に示すように１両領域１２．１３
を区画するように配線基板１１の両側縁近傍にまで蔦び
る溝１４が設けられている。そして、パワートランジス
タ等の発熱素子１および小信号トランジスタ等の温度依
存素子３は、前記溝１４によっ−て隔てられた発熱素子
取付領域１２および温度依存素子取付領域１３にそれぞ
れ別々に接合剤１５゜１６を介して固定される。
発熱素子１および温度依存素子３の各電極と配線層１０
とはワイヤ１７で接続される。また、温度依存素子３は
レジン１８で被われている。さらに、配線基板１１はそ
の裏面側を接着剤５を介し【放熱板６に固定されている
。
この実施例によれば、溝１４に対応する配線基板１１の
薄肉部分１９は熱抵抗が大きくなることから、発熱素子
ＩＫよって生じた熱の伝導度が低くなるため、温度依存
素子取付領域の温度依存素子３には熱は伝わりＫ＜＜な
り、温度依存素子３は安定して動作する。
また、この実施例では溝１４を設けて配線基板１１に熱
抵抗の大きな薄肉部分１９を形作ることから、この熱抵
抗増大に対応するだけ発熱素子取付領域１２と温度依存
素子取付領域１３の距離を接近することができ、集積度
を高めることができる。
また、主面が平坦なセラミック基板９を用いることから
、主面に配線層１０を形成することができる。この結果
、各素子の電極に一端を固定するワイヤ１７の他端は各
素子の近傍に延在する配線層１（ＨＣ接続すればよいこ
とから、ワイヤボンディングし易くかつその信頼度も高
い。また、索子取付、ワイヤボンディングも１枚の配線
基板１１上で行なえる。これらのことから組立が容易と
なりかつ工数も低くなる。したがって、製造コストの軽
減が図れる。
さらに、溝１４は有端状構造となっていることから、溝
１４の両端の厚内配線基板部分（補強部分）２０で発熱
素子取付領域１２と温度依存素子取付領域１３は強固に
連結されるため、溝１４を設けても配線基板１１は強度
的に支障を来たすことはない。
なお、本発明は前記実施例に限定されない。すなわち、
溝１４は複数でもよく、また、曲線等であってもよい。
また、第４ＷＪＫ示すようＫ、一端が配線基板１１の一
部に達する溝１４であってもよい。この場合、他端側の
厚肉配線基板部分２０が補強部となることから、一端が
側面に開口する溝１４の場合は交互に逆方向から鷺びる
溝を複数配するとよい。この実施例の一端開口溝１４で
は、実装後この溝１４内の空気は外気と交流するため、
放熱性が高くなる。
さらに、各素子取付領域１２　、１３にはそれぞれ複数
の素子を配してもよく、また、各素子取付領域はそれぞ
れ複数設けてもよい、 以上のようＫ、本発明の混成集積回路装置は、組立が容
易でかつ高集積度化が図れる。このため、製造コストの
低減化を図ることができる。
【図面の簡単な説明】
第１図は従来の混成集積回路装置を示す一部を断面とし
た正面図、第２図は本発明の一実施例による混成集積回
路装置の断面図、第３図は同じ（セラミック基板を裏返
しにした状態を示す斜視図、鮪４図は他の実施例におけ
るセラミック基板裏面を示す斜視図である。

Claims (1)

    【特許請求の範囲】
  1. １、配線基板の表面に温度依存性の高い温度依存素子と
    、発熱量の大きい発熱素子を搭載してなる混成集積回路
    装置において、前記発熱素子取付領域と温度依存素子取
    付領域との間の配線基板の裏面に両領域を区画するよう
    な方向に電在する溝を設けておくことを特徴とする混成
    集積回路装置。
JP56115073A 1981-07-24 1981-07-24 混成集積回路装置 Pending JPS5817664A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56115073A JPS5817664A (ja) 1981-07-24 1981-07-24 混成集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56115073A JPS5817664A (ja) 1981-07-24 1981-07-24 混成集積回路装置

Publications (1)

Publication Number Publication Date
JPS5817664A true JPS5817664A (ja) 1983-02-01

Family

ID=14653499

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56115073A Pending JPS5817664A (ja) 1981-07-24 1981-07-24 混成集積回路装置

Country Status (1)

Country Link
JP (1) JPS5817664A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516394A (en) * 1989-09-11 1996-05-14 Eastman Kodak Company Toner fixing method and receiving sheet
EP0915515A3 (de) * 1997-10-30 1999-11-03 Siemens Aktiengesellschaft Anordnung zum Übertragen von elektrischen Signalen zwischen einem auf einer Trägerplatte thermisch isoliertem Modul und angrenzenden Nachbarmodulen
JP2009260205A (ja) * 2008-03-17 2009-11-05 Ricoh Co Ltd 光源装置、光走査装置及び画像形成装置
DE102016209003B4 (de) * 2016-05-24 2021-04-22 Vitesco Technologies GmbH Vorrichtung zum Kühlen mindestens eines (Halbleiter)-Schalters und mindestens eines Widerstands, sowie Herstellungsverfahren

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516394A (en) * 1989-09-11 1996-05-14 Eastman Kodak Company Toner fixing method and receiving sheet
EP0915515A3 (de) * 1997-10-30 1999-11-03 Siemens Aktiengesellschaft Anordnung zum Übertragen von elektrischen Signalen zwischen einem auf einer Trägerplatte thermisch isoliertem Modul und angrenzenden Nachbarmodulen
JP2009260205A (ja) * 2008-03-17 2009-11-05 Ricoh Co Ltd 光源装置、光走査装置及び画像形成装置
DE102016209003B4 (de) * 2016-05-24 2021-04-22 Vitesco Technologies GmbH Vorrichtung zum Kühlen mindestens eines (Halbleiter)-Schalters und mindestens eines Widerstands, sowie Herstellungsverfahren

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