JPS58166464A - Ｚａｐデ−タ修正制御方式 - Google Patents

Ｚａｐデ−タ修正制御方式

Info

Publication number
JPS58166464A
JPS58166464A JP57049452A JP4945282A JPS58166464A JP S58166464 A JPS58166464 A JP S58166464A JP 57049452 A JP57049452 A JP 57049452A JP 4945282 A JP4945282 A JP 4945282A JP S58166464 A JPS58166464 A JP S58166464A
Authority
JP
Japan
Prior art keywords
correction
control
block
memory
modification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57049452A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6346862B2 (enExample
Inventor
Nobuyoshi Hara
原　伸好
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57049452A priority Critical patent/JPS58166464A/ja
Publication of JPS58166464A publication Critical patent/JPS58166464A/ja
Publication of JPS6346862B2 publication Critical patent/JPS6346862B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP57049452A 1982-03-27 1982-03-27 Ｚａｐデ−タ修正制御方式 Granted JPS58166464A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57049452A JPS58166464A (ja) 1982-03-27 1982-03-27 Ｚａｐデ−タ修正制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57049452A JPS58166464A (ja) 1982-03-27 1982-03-27 Ｚａｐデ−タ修正制御方式

Publications (2)

Publication Number Publication Date
JPS58166464A true JPS58166464A (ja) 1983-10-01
JPS6346862B2 JPS6346862B2 (enExample) 1988-09-19

Family

ID=12831527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57049452A Granted JPS58166464A (ja) 1982-03-27 1982-03-27 Ｚａｐデ−タ修正制御方式

Country Status (1)

Country Link
JP (1) JPS58166464A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63296141A (ja) * 1987-05-27 1988-12-02 Nec Corp セグメント範囲外のロ−ドモジュ−ルパッチ方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63296141A (ja) * 1987-05-27 1988-12-02 Nec Corp セグメント範囲外のロ−ドモジュ−ルパッチ方式

Also Published As

Publication number Publication date
JPS6346862B2 (enExample) 1988-09-19

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