JPS58125290A - 半導体記憶装置 - Google Patents
半導体記憶装置Info
- Publication number
- JPS58125290A JPS58125290A JP57005919A JP591982A JPS58125290A JP S58125290 A JPS58125290 A JP S58125290A JP 57005919 A JP57005919 A JP 57005919A JP 591982 A JP591982 A JP 591982A JP S58125290 A JPS58125290 A JP S58125290A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- schottky
- fet
- signal
- normally
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57005919A JPS58125290A (ja) | 1982-01-20 | 1982-01-20 | 半導体記憶装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57005919A JPS58125290A (ja) | 1982-01-20 | 1982-01-20 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58125290A true JPS58125290A (ja) | 1983-07-26 |
JPH0158592B2 JPH0158592B2 (enrdf_load_html_response) | 1989-12-12 |
Family
ID=11624294
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57005919A Granted JPS58125290A (ja) | 1982-01-20 | 1982-01-20 | 半導体記憶装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58125290A (enrdf_load_html_response) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6059589A (ja) * | 1983-09-12 | 1985-04-05 | Toshiba Corp | 半導体メモリ装置 |
JPH0654513U (ja) * | 1992-07-15 | 1994-07-26 | アサノ精機株式会社 | 粉粒体包装装置における方向変換機構 |
-
1982
- 1982-01-20 JP JP57005919A patent/JPS58125290A/ja active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6059589A (ja) * | 1983-09-12 | 1985-04-05 | Toshiba Corp | 半導体メモリ装置 |
JPH0654513U (ja) * | 1992-07-15 | 1994-07-26 | アサノ精機株式会社 | 粉粒体包装装置における方向変換機構 |
Also Published As
Publication number | Publication date |
---|---|
JPH0158592B2 (enrdf_load_html_response) | 1989-12-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US3995172A (en) | Enhancement-and depletion-type field effect transistors connected in parallel | |
US5134581A (en) | Highly stable semiconductor memory with a small memory cell area | |
JPS6025837B2 (ja) | 半導体記憶装置 | |
JPH0746506B2 (ja) | 半導体メモリ装置 | |
US4091460A (en) | Quasi static, virtually nonvolatile random access memory cell | |
KR100291153B1 (ko) | 스태틱램 | |
JPS5855597B2 (ja) | 双安定半導体メモリセル | |
JPS58125290A (ja) | 半導体記憶装置 | |
JPH0777075B2 (ja) | デコーダ−ドライバ回路 | |
JP3363038B2 (ja) | 半導体記憶装置 | |
JP2542022B2 (ja) | 電界効果トランジスタ負荷回路 | |
KR100282761B1 (ko) | I/o 클램프 회로를 구비한 반도체 메모리 장치 | |
JPH117776A (ja) | 半導体記憶装置 | |
JPH03192595A (ja) | メモリセルとメモリ集積回路 | |
JPH03228291A (ja) | ガリウム砒素半導体記憶装置 | |
JPH0370320B2 (enrdf_load_html_response) | ||
JPH03148877A (ja) | フローティングゲート型メモリー素子 | |
JPH06215574A (ja) | メモリシステム | |
JPS6038864A (ja) | 半導体メモリセル | |
JPS63104300A (ja) | 電圧判定回路 | |
JPH0313676B2 (enrdf_load_html_response) | ||
JPS6149758B2 (enrdf_load_html_response) | ||
JPH01138748A (ja) | ガリウム砒素半導体メモリ集積回路 | |
JPH0459719B2 (enrdf_load_html_response) | ||
JPS6028262A (ja) | 半導体メモリセル |