JPS58123148A - デ−タ伝送システム - Google Patents

デ−タ伝送システム

Info

Publication number
JPS58123148A
JPS58123148A JP57004991A JP499182A JPS58123148A JP S58123148 A JPS58123148 A JP S58123148A JP 57004991 A JP57004991 A JP 57004991A JP 499182 A JP499182 A JP 499182A JP S58123148 A JPS58123148 A JP S58123148A
Authority
JP
Japan
Prior art keywords
address
data
output
circuit
data memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57004991A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6353578B2 (enrdf_load_stackoverflow
Inventor
Tadashi Okamoto
正 岡本
Kazuhiko Shimoyama
和彦 下山
Mitsuo Takakura
高倉 満郎
Noboru Azusawa
梓沢 昇
Osao Yoshida
吉田 長生
Takakazu Sakurai
桜井 孝員
Susumu Kitani
木谷 進
Yutaka Saito
裕 斉藤
Yuji Kikuchi
菊池 雄司
Yoshihiro Uekane
上金 良博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57004991A priority Critical patent/JPS58123148A/ja
Priority to DE8282109102T priority patent/DE3278949D1/de
Priority to EP19820109102 priority patent/EP0076494B1/en
Priority to BR8205828A priority patent/BR8205828A/pt
Publication of JPS58123148A publication Critical patent/JPS58123148A/ja
Publication of JPS6353578B2 publication Critical patent/JPS6353578B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Small-Scale Networks (AREA)
JP57004991A 1981-10-07 1982-01-18 デ−タ伝送システム Granted JPS58123148A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP57004991A JPS58123148A (ja) 1982-01-18 1982-01-18 デ−タ伝送システム
DE8282109102T DE3278949D1 (en) 1981-10-07 1982-10-01 Data transmission bus system for a plurality of processors
EP19820109102 EP0076494B1 (en) 1981-10-07 1982-10-01 Data transmission bus system for a plurality of processors
BR8205828A BR8205828A (pt) 1981-10-07 1982-10-05 Sistema de transmissao de dados

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57004991A JPS58123148A (ja) 1982-01-18 1982-01-18 デ−タ伝送システム

Publications (2)

Publication Number Publication Date
JPS58123148A true JPS58123148A (ja) 1983-07-22
JPS6353578B2 JPS6353578B2 (enrdf_load_stackoverflow) 1988-10-24

Family

ID=11599069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57004991A Granted JPS58123148A (ja) 1981-10-07 1982-01-18 デ−タ伝送システム

Country Status (1)

Country Link
JP (1) JPS58123148A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01114902A (ja) * 1987-10-29 1989-05-08 Hitachi Ltd プロセス制御システム
JP2011140859A (ja) * 2009-12-11 2011-07-21 Kawase Komuten:Kk 作業用足場装置及び躯体作業方法並びに躯体仮設構台提供方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5660930A (en) * 1979-10-24 1981-05-26 Fujitsu Ltd Data transfer system
JPS57125427A (en) * 1981-01-28 1982-08-04 Nec Corp Circuit for transmitting simultaneously command signal
JPS58109960A (ja) * 1981-12-22 1983-06-30 インタ−シル・インコ−ポレ−テツド デ−タ処理システム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5660930A (en) * 1979-10-24 1981-05-26 Fujitsu Ltd Data transfer system
JPS57125427A (en) * 1981-01-28 1982-08-04 Nec Corp Circuit for transmitting simultaneously command signal
JPS58109960A (ja) * 1981-12-22 1983-06-30 インタ−シル・インコ−ポレ−テツド デ−タ処理システム

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01114902A (ja) * 1987-10-29 1989-05-08 Hitachi Ltd プロセス制御システム
JP2011140859A (ja) * 2009-12-11 2011-07-21 Kawase Komuten:Kk 作業用足場装置及び躯体作業方法並びに躯体仮設構台提供方法

Also Published As

Publication number Publication date
JPS6353578B2 (enrdf_load_stackoverflow) 1988-10-24

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