JPS58121642A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58121642A
JPS58121642A JP280082A JP280082A JPS58121642A JP S58121642 A JPS58121642 A JP S58121642A JP 280082 A JP280082 A JP 280082A JP 280082 A JP280082 A JP 280082A JP S58121642 A JPS58121642 A JP S58121642A
Authority
JP
Japan
Prior art keywords
layer
single crystal
insulator
substrate
concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP280082A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6325707B2 (enrdf_load_stackoverflow
Inventor
Michiharu Tanabe
田部　道晴
Masaaki Sato
政明 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP280082A priority Critical patent/JPS58121642A/ja
Publication of JPS58121642A publication Critical patent/JPS58121642A/ja
Publication of JPS6325707B2 publication Critical patent/JPS6325707B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281—Lateral isolation by selective oxidation of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)
JP280082A 1982-01-13 1982-01-13 半導体装置の製造方法 Granted JPS58121642A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP280082A JPS58121642A (ja) 1982-01-13 1982-01-13 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP280082A JPS58121642A (ja) 1982-01-13 1982-01-13 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58121642A true JPS58121642A (ja) 1983-07-20
JPS6325707B2 JPS6325707B2 (enrdf_load_stackoverflow) 1988-05-26

Family

ID=11539443

Family Applications (1)

Application Number Title Priority Date Filing Date
JP280082A Granted JPS58121642A (ja) 1982-01-13 1982-01-13 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58121642A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598346A (ja) * 1982-06-30 1984-01-17 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン 完全に誘電体分離された集積回路の製造方法
JPS6294254A (ja) * 1985-10-17 1987-04-30 Bandou Kiko Kk ガラス板の研削機械
US4925805A (en) * 1988-04-05 1990-05-15 U.S. Philips Corporation Method of manufacturing a semiconductor device having an SOI structure using selectable etching
JP2007180570A (ja) * 2007-02-14 2007-07-12 Toshiba Corp 半導体装置および半導体装置の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598346A (ja) * 1982-06-30 1984-01-17 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン 完全に誘電体分離された集積回路の製造方法
JPS6294254A (ja) * 1985-10-17 1987-04-30 Bandou Kiko Kk ガラス板の研削機械
US4925805A (en) * 1988-04-05 1990-05-15 U.S. Philips Corporation Method of manufacturing a semiconductor device having an SOI structure using selectable etching
JP2007180570A (ja) * 2007-02-14 2007-07-12 Toshiba Corp 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
JPS6325707B2 (enrdf_load_stackoverflow) 1988-05-26

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