JPS58105348A - 演算処理回路 - Google Patents

演算処理回路

Info

Publication number
JPS58105348A
JPS58105348A JP20424081A JP20424081A JPS58105348A JP S58105348 A JPS58105348 A JP S58105348A JP 20424081 A JP20424081 A JP 20424081A JP 20424081 A JP20424081 A JP 20424081A JP S58105348 A JPS58105348 A JP S58105348A
Authority
JP
Japan
Prior art keywords
signal
circuit
clock
output
becomes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20424081A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0225539B2 (enrdf_load_stackoverflow
Inventor
Kazuo Hirobe
広部　和雄
Ayumi Takahashi
歩 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP20424081A priority Critical patent/JPS58105348A/ja
Publication of JPS58105348A publication Critical patent/JPS58105348A/ja
Publication of JPH0225539B2 publication Critical patent/JPH0225539B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
JP20424081A 1981-12-17 1981-12-17 演算処理回路 Granted JPS58105348A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20424081A JPS58105348A (ja) 1981-12-17 1981-12-17 演算処理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20424081A JPS58105348A (ja) 1981-12-17 1981-12-17 演算処理回路

Publications (2)

Publication Number Publication Date
JPS58105348A true JPS58105348A (ja) 1983-06-23
JPH0225539B2 JPH0225539B2 (enrdf_load_stackoverflow) 1990-06-04

Family

ID=16487163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20424081A Granted JPS58105348A (ja) 1981-12-17 1981-12-17 演算処理回路

Country Status (1)

Country Link
JP (1) JPS58105348A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0413023U (enrdf_load_stackoverflow) * 1990-05-25 1992-02-03

Also Published As

Publication number Publication date
JPH0225539B2 (enrdf_load_stackoverflow) 1990-06-04

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