JPH0222568B2 - - Google Patents
Info
- Publication number
- JPH0222568B2 JPH0222568B2 JP58242560A JP24256083A JPH0222568B2 JP H0222568 B2 JPH0222568 B2 JP H0222568B2 JP 58242560 A JP58242560 A JP 58242560A JP 24256083 A JP24256083 A JP 24256083A JP H0222568 B2 JPH0222568 B2 JP H0222568B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- field effect
- signal
- power supply
- preset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005669 field effect Effects 0.000 claims description 28
- 230000000295 complement effect Effects 0.000 claims description 3
- 230000000694 effects Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 15
- 230000003111 delayed effect Effects 0.000 description 5
- 230000014759 maintenance of location Effects 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58242560A JPS60134518A (ja) | 1983-12-22 | 1983-12-22 | デイジタル遅延回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58242560A JPS60134518A (ja) | 1983-12-22 | 1983-12-22 | デイジタル遅延回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60134518A JPS60134518A (ja) | 1985-07-17 |
JPH0222568B2 true JPH0222568B2 (enrdf_load_stackoverflow) | 1990-05-21 |
Family
ID=17090903
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58242560A Granted JPS60134518A (ja) | 1983-12-22 | 1983-12-22 | デイジタル遅延回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60134518A (enrdf_load_stackoverflow) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62282823A (ja) * | 1986-05-28 | 1987-12-08 | Fanuc Ltd | ワイヤ放電加工機の3点支持ガイド |
JP2006333105A (ja) * | 2005-05-26 | 2006-12-07 | Toshiba Microelectronics Corp | データラッチ回路およびそれを用いた液晶表示装置 |
-
1983
- 1983-12-22 JP JP58242560A patent/JPS60134518A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60134518A (ja) | 1985-07-17 |
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