JPS5794982A - Memory circuit - Google Patents

Memory circuit

Info

Publication number
JPS5794982A
JPS5794982A JP55170070A JP17007080A JPS5794982A JP S5794982 A JPS5794982 A JP S5794982A JP 55170070 A JP55170070 A JP 55170070A JP 17007080 A JP17007080 A JP 17007080A JP S5794982 A JPS5794982 A JP S5794982A
Authority
JP
Japan
Prior art keywords
shot
signal
inputted
gate
equalization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55170070A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6218990B2 (enrdf_load_stackoverflow
Inventor
Shigetaka Sueyoshi
Kazuo Tokushige
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55170070A priority Critical patent/JPS5794982A/ja
Publication of JPS5794982A publication Critical patent/JPS5794982A/ja
Publication of JPS6218990B2 publication Critical patent/JPS6218990B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
JP55170070A 1980-12-02 1980-12-02 Memory circuit Granted JPS5794982A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55170070A JPS5794982A (en) 1980-12-02 1980-12-02 Memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55170070A JPS5794982A (en) 1980-12-02 1980-12-02 Memory circuit

Publications (2)

Publication Number Publication Date
JPS5794982A true JPS5794982A (en) 1982-06-12
JPS6218990B2 JPS6218990B2 (enrdf_load_stackoverflow) 1987-04-25

Family

ID=15898071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55170070A Granted JPS5794982A (en) 1980-12-02 1980-12-02 Memory circuit

Country Status (1)

Country Link
JP (1) JPS5794982A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110091A (ja) * 1982-12-14 1984-06-25 Nec Corp 出力回路
JPS59154692A (ja) * 1983-02-23 1984-09-03 Toshiba Corp 半導体記憶装置
JPS61113186A (ja) * 1984-07-09 1986-05-31 テキサス　インスツルメンツ　インコ−ポレイテツド 遷移検出回路
JPS63173296A (ja) * 1987-01-12 1988-07-16 Sony Corp メモリ装置のプルアツプ回路
JPH02177196A (ja) * 1988-12-28 1990-07-10 Toshiba Corp スタティック型半導体メモリ

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021106093A1 (ja) 2019-11-27 2021-06-03 三菱電機株式会社 反射鏡アンテナ装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110091A (ja) * 1982-12-14 1984-06-25 Nec Corp 出力回路
JPS59154692A (ja) * 1983-02-23 1984-09-03 Toshiba Corp 半導体記憶装置
JPS61113186A (ja) * 1984-07-09 1986-05-31 テキサス　インスツルメンツ　インコ−ポレイテツド 遷移検出回路
JPS63173296A (ja) * 1987-01-12 1988-07-16 Sony Corp メモリ装置のプルアツプ回路
JPH02177196A (ja) * 1988-12-28 1990-07-10 Toshiba Corp スタティック型半導体メモリ

Also Published As

Publication number Publication date
JPS6218990B2 (enrdf_load_stackoverflow) 1987-04-25

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