JPS5791032A - Logical circuit device - Google Patents

Logical circuit device

Info

Publication number
JPS5791032A
JPS5791032A JP16887280A JP16887280A JPS5791032A JP S5791032 A JPS5791032 A JP S5791032A JP 16887280 A JP16887280 A JP 16887280A JP 16887280 A JP16887280 A JP 16887280A JP S5791032 A JPS5791032 A JP S5791032A
Authority
JP
Japan
Prior art keywords
potential
emitter
trq1
base
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16887280A
Other languages
English (en)
Other versions
JPS6347011B2 (ja
Inventor
Shuichi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16887280A priority Critical patent/JPS5791032A/ja
Publication of JPS5791032A publication Critical patent/JPS5791032A/ja
Publication of JPS6347011B2 publication Critical patent/JPS6347011B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP16887280A 1980-11-27 1980-11-27 Logical circuit device Granted JPS5791032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16887280A JPS5791032A (en) 1980-11-27 1980-11-27 Logical circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16887280A JPS5791032A (en) 1980-11-27 1980-11-27 Logical circuit device

Publications (2)

Publication Number Publication Date
JPS5791032A true JPS5791032A (en) 1982-06-07
JPS6347011B2 JPS6347011B2 (ja) 1988-09-20

Family

ID=15876121

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16887280A Granted JPS5791032A (en) 1980-11-27 1980-11-27 Logical circuit device

Country Status (1)

Country Link
JP (1) JPS5791032A (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0335449Y2 (ja) * 1988-10-25 1991-07-26

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS515947A (en) * 1974-07-03 1976-01-19 Fujitsu Ltd Kurotsuku doraibakairo
JPS5318376A (en) * 1976-08-04 1978-02-20 Fujitsu Ltd Receiving circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS515947A (en) * 1974-07-03 1976-01-19 Fujitsu Ltd Kurotsuku doraibakairo
JPS5318376A (en) * 1976-08-04 1978-02-20 Fujitsu Ltd Receiving circuit

Also Published As

Publication number Publication date
JPS6347011B2 (ja) 1988-09-20

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