JPS5790734A - Switching system of input/output device - Google Patents

Switching system of input/output device

Info

Publication number
JPS5790734A
JPS5790734A JP55166761A JP16676180A JPS5790734A JP S5790734 A JPS5790734 A JP S5790734A JP 55166761 A JP55166761 A JP 55166761A JP 16676180 A JP16676180 A JP 16676180A JP S5790734 A JPS5790734 A JP S5790734A
Authority
JP
Japan
Prior art keywords
input
output device
fault
arithmetic controller
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55166761A
Other languages
Japanese (ja)
Inventor
Kazuo Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55166761A priority Critical patent/JPS5790734A/en
Publication of JPS5790734A publication Critical patent/JPS5790734A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)

Abstract

PURPOSE:To realize the flexible countermeasures according to the purpose to the fault of an input/output device, by providing an address list of the input/output devices to which an arithmetic controller should give an access in case a part or the whole of an input/output device has a fault. CONSTITUTION:An arithmetic controller is connected to plural input/output devices having their own addresses respectively via a bus. An address list T1 of the input/output device to which the arithmetic controller should give an access when the system is nondefective plus an address list T2 of the input/output device to which the arithmetic controller should give an access when a part or the whole of the input/output device has a fault are provided to the arithmetic controller. In addition, fault detection part is provided to each input/output device and the lists T1 and T2 are switched for the input/output device to which an access should be given when a fault is detected among the connected input/output devices. For instance, when a fault arises to a process input/output device having a direct effect to a control subject, only the function related to the faulty input/ output device is locked as long as the functions of the arithmetic controller can be separated. And other controls are continued.
JP55166761A 1980-11-28 1980-11-28 Switching system of input/output device Pending JPS5790734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55166761A JPS5790734A (en) 1980-11-28 1980-11-28 Switching system of input/output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55166761A JPS5790734A (en) 1980-11-28 1980-11-28 Switching system of input/output device

Publications (1)

Publication Number Publication Date
JPS5790734A true JPS5790734A (en) 1982-06-05

Family

ID=15837217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55166761A Pending JPS5790734A (en) 1980-11-28 1980-11-28 Switching system of input/output device

Country Status (1)

Country Link
JP (1) JPS5790734A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6459550A (en) * 1987-08-31 1989-03-07 Fujitsu Ltd System for controlling automatic bypass of message

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6459550A (en) * 1987-08-31 1989-03-07 Fujitsu Ltd System for controlling automatic bypass of message

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