JPS5713567A - Multiprocessor system - Google Patents

Multiprocessor system

Info

Publication number
JPS5713567A
JPS5713567A JP8831280A JP8831280A JPS5713567A JP S5713567 A JPS5713567 A JP S5713567A JP 8831280 A JP8831280 A JP 8831280A JP 8831280 A JP8831280 A JP 8831280A JP S5713567 A JPS5713567 A JP S5713567A
Authority
JP
Japan
Prior art keywords
signal
synchronizing
equipments
fault
equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8831280A
Other languages
Japanese (ja)
Other versions
JPS6112589B2 (en
Inventor
Ryuji Sakashita
Kohei Takeno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8831280A priority Critical patent/JPS5713567A/en
Publication of JPS5713567A publication Critical patent/JPS5713567A/en
Publication of JPS6112589B2 publication Critical patent/JPS6112589B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Safety Devices In Control Systems (AREA)

Abstract

PURPOSE:To prevent the fact that the whole system becomes faulty due to a partial fault of the system, by making each processing equipment generate a synchronizing signal, also exchanging it each other, selecting one of said signal, and making the equipments execute a synchronizing operation. CONSTITUTION:In case when processing equipments 4, 5 select a synchronizing signal S2 and are executing a synchronizing operation, if a fault occurs in the equipment 4, an output of the signal S2 is stopped. When an output of the signal S2 is stopped, the equipments 4, 5 are unable to detect the signal S2, change over the synchronizing signal S2 to a signal S3 when a prescribed time limit T has elapsed, and synchronize the signal S3. As a result, a synchronizing signal is generated by each equipment 4, 5, also it is exchanged with each other, one of them is selected, and a synchronizing operation is executed. In this way, even if a fault occurs in a part of the system, it is prevented to cause a fault of the whole system.
JP8831280A 1980-06-27 1980-06-27 Multiprocessor system Granted JPS5713567A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8831280A JPS5713567A (en) 1980-06-27 1980-06-27 Multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8831280A JPS5713567A (en) 1980-06-27 1980-06-27 Multiprocessor system

Publications (2)

Publication Number Publication Date
JPS5713567A true JPS5713567A (en) 1982-01-23
JPS6112589B2 JPS6112589B2 (en) 1986-04-09

Family

ID=13939404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8831280A Granted JPS5713567A (en) 1980-06-27 1980-06-27 Multiprocessor system

Country Status (1)

Country Link
JP (1) JPS5713567A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6063633A (en) * 1983-09-16 1985-04-12 Sanyo Electric Co Ltd Clock control circuit of disk controller
JPS61260352A (en) * 1985-05-14 1986-11-18 Mitsubishi Electric Corp Multiprocessor system
JPH01175602A (en) * 1987-12-29 1989-07-12 Hitachi Ltd Synchronizing device for redundancy control system
JPH02141801A (en) * 1988-11-24 1990-05-31 Toshiba Corp Multiplexing controller
US6674315B2 (en) 2001-08-20 2004-01-06 Nec Corporation Clock signal generation device
JP2006323677A (en) * 2005-05-19 2006-11-30 Mitsubishi Electric Corp Dual-system control system
JP2010205154A (en) * 2009-03-05 2010-09-16 Fujitsu Ltd Clock supply method and information processing apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53114638A (en) * 1977-03-17 1978-10-06 Fujitsu Ltd Clock switching system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53114638A (en) * 1977-03-17 1978-10-06 Fujitsu Ltd Clock switching system

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6063633A (en) * 1983-09-16 1985-04-12 Sanyo Electric Co Ltd Clock control circuit of disk controller
JPH0318207B2 (en) * 1983-09-16 1991-03-12 Sanyo Electric Co
JPS61260352A (en) * 1985-05-14 1986-11-18 Mitsubishi Electric Corp Multiprocessor system
JPH0529947B2 (en) * 1985-05-14 1993-05-06 Mitsubishi Electric Corp
JPH01175602A (en) * 1987-12-29 1989-07-12 Hitachi Ltd Synchronizing device for redundancy control system
JPH02141801A (en) * 1988-11-24 1990-05-31 Toshiba Corp Multiplexing controller
US6674315B2 (en) 2001-08-20 2004-01-06 Nec Corporation Clock signal generation device
JP2006323677A (en) * 2005-05-19 2006-11-30 Mitsubishi Electric Corp Dual-system control system
JP4657802B2 (en) * 2005-05-19 2011-03-23 三菱電機株式会社 Dual system control system
JP2010205154A (en) * 2009-03-05 2010-09-16 Fujitsu Ltd Clock supply method and information processing apparatus

Also Published As

Publication number Publication date
JPS6112589B2 (en) 1986-04-09

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