JPS578838A - Reception controlling system of terminal controller - Google Patents

Reception controlling system of terminal controller

Info

Publication number
JPS578838A
JPS578838A JP8338880A JP8338880A JPS578838A JP S578838 A JPS578838 A JP S578838A JP 8338880 A JP8338880 A JP 8338880A JP 8338880 A JP8338880 A JP 8338880A JP S578838 A JPS578838 A JP S578838A
Authority
JP
Japan
Prior art keywords
error
parity
detection latch
data
reset signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8338880A
Other languages
English (en)
Other versions
JPS6256545B2 (ja
Inventor
Takashi Nagaoka
Takeyoshi Koseki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8338880A priority Critical patent/JPS578838A/ja
Publication of JPS578838A publication Critical patent/JPS578838A/ja
Publication of JPS6256545B2 publication Critical patent/JPS6256545B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
JP8338880A 1980-06-19 1980-06-19 Reception controlling system of terminal controller Granted JPS578838A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8338880A JPS578838A (en) 1980-06-19 1980-06-19 Reception controlling system of terminal controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8338880A JPS578838A (en) 1980-06-19 1980-06-19 Reception controlling system of terminal controller

Publications (2)

Publication Number Publication Date
JPS578838A true JPS578838A (en) 1982-01-18
JPS6256545B2 JPS6256545B2 (ja) 1987-11-26

Family

ID=13801030

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8338880A Granted JPS578838A (en) 1980-06-19 1980-06-19 Reception controlling system of terminal controller

Country Status (1)

Country Link
JP (1) JPS578838A (ja)

Also Published As

Publication number Publication date
JPS6256545B2 (ja) 1987-11-26

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