JPS5786952A - Microprogram control information processor - Google Patents

Microprogram control information processor

Info

Publication number
JPS5786952A
JPS5786952A JP16380480A JP16380480A JPS5786952A JP S5786952 A JPS5786952 A JP S5786952A JP 16380480 A JP16380480 A JP 16380480A JP 16380480 A JP16380480 A JP 16380480A JP S5786952 A JPS5786952 A JP S5786952A
Authority
JP
Japan
Prior art keywords
microinstruction
register
address
stack
return
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16380480A
Other languages
Japanese (ja)
Inventor
Shigemi Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16380480A priority Critical patent/JPS5786952A/en
Publication of JPS5786952A publication Critical patent/JPS5786952A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection

Abstract

PURPOSE:To read a microinstruction in a return destination address at a high speed by holding a return address, outputted as a microinstruction address, in a stack register when a return instruction is read out. CONSTITUTION:A microinstruction address stored in a register MAR is used to read a microinstruction out of a control storage device CS and it is set in a microinstruction register MIR. Then, the microinstruction address in the register MAR is increased by one and the control is transferred to the execution of the next microinstruction. When the readout microinstruction is a branch instruction to a subroutine, a stack register input switching selector SEL transfers the microinstruction address from the register MAR to a stack register STACK. After the new subroutine branch instruction is executed, the return address in the register STACK is stored in a stack memory RTA at an address obtained by adding one to the point of a stack point SP, and a new return address is stored in the register STACK.
JP16380480A 1980-11-20 1980-11-20 Microprogram control information processor Pending JPS5786952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16380480A JPS5786952A (en) 1980-11-20 1980-11-20 Microprogram control information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16380480A JPS5786952A (en) 1980-11-20 1980-11-20 Microprogram control information processor

Publications (1)

Publication Number Publication Date
JPS5786952A true JPS5786952A (en) 1982-05-31

Family

ID=15781014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16380480A Pending JPS5786952A (en) 1980-11-20 1980-11-20 Microprogram control information processor

Country Status (1)

Country Link
JP (1) JPS5786952A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6898698B1 (en) 1999-09-29 2005-05-24 Fujitsu Limited Device predicting a branch of an instruction equivalent to a subroutine return and a method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6898698B1 (en) 1999-09-29 2005-05-24 Fujitsu Limited Device predicting a branch of an instruction equivalent to a subroutine return and a method thereof

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