JPS54117643A - Channel control system - Google Patents

Channel control system

Info

Publication number
JPS54117643A
JPS54117643A JP2452878A JP2452878A JPS54117643A JP S54117643 A JPS54117643 A JP S54117643A JP 2452878 A JP2452878 A JP 2452878A JP 2452878 A JP2452878 A JP 2452878A JP S54117643 A JPS54117643 A JP S54117643A
Authority
JP
Japan
Prior art keywords
control storage
contents
micro instructions
interrupt
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2452878A
Other languages
Japanese (ja)
Inventor
Hideo Igarashi
Mitsuhiro Yamaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2452878A priority Critical patent/JPS54117643A/en
Publication of JPS54117643A publication Critical patent/JPS54117643A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase a processing speed and reduce the capacity of a control storage by reading successively micro instructions from the control storage while using contents of a selected program address register as read addresses and executing these micro instructions.
CONSTITUTION: Program address registers 2 store read addresses of control storage 3 where a micro program is stored and are equipped correspondingly to respective channels, and one of registers 2 is selected according to contents of channel address register 1 which stores temporarily an interrupt channel number. Contents of selected register 2 are used as read addresses to read successively micro instructions from control storage 3 and execute these micro instructions, and simultaneously, contents of selected register 2 are updated to execute the interrupt processing of the interrupt chanel. As a result, the processing speed can be increased, and the capacity of control storage 3 can be reduced.
COPYRIGHT: (C)1979,JPO&Japio
JP2452878A 1978-03-06 1978-03-06 Channel control system Pending JPS54117643A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2452878A JPS54117643A (en) 1978-03-06 1978-03-06 Channel control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2452878A JPS54117643A (en) 1978-03-06 1978-03-06 Channel control system

Publications (1)

Publication Number Publication Date
JPS54117643A true JPS54117643A (en) 1979-09-12

Family

ID=12140644

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2452878A Pending JPS54117643A (en) 1978-03-06 1978-03-06 Channel control system

Country Status (1)

Country Link
JP (1) JPS54117643A (en)

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