JPS5778188A - Josephson integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a Josephson integrated circuit having preferable characteristics by covering all lead alloy superconductor layers except the uppermost lead alloy superconductor layer with insulator layers prior to the formation of the uppermost superconductor layer, thereby employing highly accurate etching method in the patterning of the uppermost layer required for the minimum line width. CONSTITUTION:Insulator layers 33, 35, 38 and lead alloy superconductor layers 34, 36, 39 are arranged on a superconductor ground surface 32 formed on a substrate 31, and an oxidized film barrier 37 is interposed between the layers 34 and 36 to form a Josephson integrated circuit. Such multilayer structure can be obtined by forming in sequence of insulator layer, lead alloy superconductor layers, oxidized barrier 33, 34, 35, 37, 36, 38, 39, and the layers 34, 36 formed prior to the formation o f the uppermost layer 39 are completely covered by the layers 35, 38 or the uppermost layer 39. Thereafter, the layer 39 is etched with a photoresist film as a mask, and the element having the minimum line width of 1mum or less can be obtained.