JPS5778179A - Semiconductor non-voltatile memory - Google Patents

Semiconductor non-voltatile memory

Info

Publication number
JPS5778179A
JPS5778179A JP15486380A JP15486380A JPS5778179A JP S5778179 A JPS5778179 A JP S5778179A JP 15486380 A JP15486380 A JP 15486380A JP 15486380 A JP15486380 A JP 15486380A JP S5778179 A JPS5778179 A JP S5778179A
Authority
JP
Japan
Prior art keywords
region
type
injector
diffused
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15486380A
Other languages
Japanese (ja)
Inventor
Yoshio Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP15486380A priority Critical patent/JPS5778179A/en
Publication of JPS5778179A publication Critical patent/JPS5778179A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To prevent the flow-out of electrons injected from an injector in a substrate direction by surrounding the periphery of an injector diffused layer forming a floating gate type memory with a reverse conductive type diffused layer to the injector layer and forming a thin layer of different conductive type thereto at a part thereof. CONSTITUTION:A p<-> well region 11 is diffused in an n<-> type Si substrate 10, an n<+> type drain region 12, a source region 13 and a control gate 14 are respectively formed therein, and an n<+> type injector diffused region 17 is formed at the outside of a gate 14 at the end of a well region 11. At this time the region 17 is surrounded by a p<+> type color region 18 extending into the substrate 10, and a thin n<-> type region 19 contacted with the region 17 is formed by ion injection or the like in the region 18. Thereafter, an insulating film 15 buried with a floating gate 16 is covered on the overall surface as ordinarily, a hole is opened, and leading electrodes contacted with the regions 12, 17 are mounted. In this mannr, a writing is enabled with small amount of current.
JP15486380A 1980-11-04 1980-11-04 Semiconductor non-voltatile memory Pending JPS5778179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15486380A JPS5778179A (en) 1980-11-04 1980-11-04 Semiconductor non-voltatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15486380A JPS5778179A (en) 1980-11-04 1980-11-04 Semiconductor non-voltatile memory

Publications (1)

Publication Number Publication Date
JPS5778179A true JPS5778179A (en) 1982-05-15

Family

ID=15593556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15486380A Pending JPS5778179A (en) 1980-11-04 1980-11-04 Semiconductor non-voltatile memory

Country Status (1)

Country Link
JP (1) JPS5778179A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5309009A (en) * 1992-09-14 1994-05-03 Chao Robert L Integrated electrically adjustable analog transistor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5309009A (en) * 1992-09-14 1994-05-03 Chao Robert L Integrated electrically adjustable analog transistor device

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