JPS5778152A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5778152A
JPS5778152A JP15324580A JP15324580A JPS5778152A JP S5778152 A JPS5778152 A JP S5778152A JP 15324580 A JP15324580 A JP 15324580A JP 15324580 A JP15324580 A JP 15324580A JP S5778152 A JPS5778152 A JP S5778152A
Authority
JP
Japan
Prior art keywords
etching
series
film
electrode
leakage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15324580A
Other languages
Japanese (ja)
Inventor
Masaki Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15324580A priority Critical patent/JPS5778152A/en
Publication of JPS5778152A publication Critical patent/JPS5778152A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent the leakage and short-circuit between wires in a semiconductor device by forming an intermediate layer of different etching characteristics on a primary insulating layer, forming an electrode wire and dry etching at least surface of the exposed intermediate layer, thereby effectively removing residue on a conductive layer. CONSTITUTION:In a step of wiring, for example, the electrode of an MOSIC, a polysilicon gate 5 and diffused layers 6, 7 are formed, and a primary SiO2 film 8 and an intermediate Si3N4 film 9 are laminated on the overall surface. Then, a resist mask is provided, windows are opened at the films 8, 9 with CF4-H2 series try etchant, the resist is removed, and an Al-Si alloy film 11 is, for example, formed. Subsequently, an electrode wire 11 is formed by a resist mask 12 and CCl4 series dry etchant, is then treated with plasma with CF4-O2 series, and the exposed Si3N4 film 9 is etched and removed with the residue 13 of the alloy film. In this manner, the constituent materials are treated in combination of etching methods of different etching speed, thereby preventing the leakage and the short-circuit between the electrode wires with high reliability without excessive etching of the layers 11 and 8.
JP15324580A 1980-10-31 1980-10-31 Manufacture of semiconductor device Pending JPS5778152A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15324580A JPS5778152A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15324580A JPS5778152A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5778152A true JPS5778152A (en) 1982-05-15

Family

ID=15558225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15324580A Pending JPS5778152A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5778152A (en)

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