JPS5772377A - Wiring method for self-aligning gate - Google Patents

Wiring method for self-aligning gate

Info

Publication number
JPS5772377A
JPS5772377A JP14862880A JP14862880A JPS5772377A JP S5772377 A JPS5772377 A JP S5772377A JP 14862880 A JP14862880 A JP 14862880A JP 14862880 A JP14862880 A JP 14862880A JP S5772377 A JPS5772377 A JP S5772377A
Authority
JP
Japan
Prior art keywords
gate
source regions
section
self
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14862880A
Other languages
Japanese (ja)
Inventor
Yasuo Suzuki
Hiroshi Hirao
Norihiko Saho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14862880A priority Critical patent/JPS5772377A/en
Publication of JPS5772377A publication Critical patent/JPS5772377A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883—Combination of depletion and enhancement field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To improve the degree of integration by preventing the effect of a branched section of the self-aligning gate, which crosses on a source or a drain region of a transistor, on the characteristics of the transistor. CONSTITUTION:A high concentration impurity added DIF with the same conduction type as source regions S1, S2, which connects a section between the source regions S1, S2 divided by the branched section of the gate SG1 to a gate SG2, is formed previously through ion injection or diffusion or the like before shaping the gates SG1, SG2. Accordingly, since a depletion type MOSFETT3 is formed between the source regions S1 and S2, the section between the source regions S1 and S2 is conducted at all times, and the MOSFETT1 normally functions.
JP14862880A 1980-10-23 1980-10-23 Wiring method for self-aligning gate Pending JPS5772377A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14862880A JPS5772377A (en) 1980-10-23 1980-10-23 Wiring method for self-aligning gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14862880A JPS5772377A (en) 1980-10-23 1980-10-23 Wiring method for self-aligning gate

Publications (1)

Publication Number Publication Date
JPS5772377A true JPS5772377A (en) 1982-05-06

Family

ID=15457030

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14862880A Pending JPS5772377A (en) 1980-10-23 1980-10-23 Wiring method for self-aligning gate

Country Status (1)

Country Link
JP (1) JPS5772377A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4521294Y1 (en) * 1965-12-03 1970-08-25
JPS5047576A (en) * 1973-08-31 1975-04-28

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4521294Y1 (en) * 1965-12-03 1970-08-25
JPS5047576A (en) * 1973-08-31 1975-04-28

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