JPS576491A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS576491A
JPS576491A JP8181880A JP8181880A JPS576491A JP S576491 A JPS576491 A JP S576491A JP 8181880 A JP8181880 A JP 8181880A JP 8181880 A JP8181880 A JP 8181880A JP S576491 A JPS576491 A JP S576491A
Authority
JP
Japan
Prior art keywords
rom2
test
data
signal
code test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8181880A
Other languages
Japanese (ja)
Inventor
Kazuo Hayashi
Kunihiro Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8181880A priority Critical patent/JPS576491A/en
Publication of JPS576491A publication Critical patent/JPS576491A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To easily execute a code test, by providing a code test mechanism in the inside of an LSI containing a ROM in one chip. CONSTITUTION:An ROM code test part 9 is provided in the inside of a semiconductor device (LSI) 1 containing an ROM2. The device becomes a test mode by a signal 15, and a test control part 4 increases an address designating part 3 in order from ''0'' address. All parallel outputs of ond word by one for the ROM2 are converted to a series signal through a multiplexer 6 and a parallel-series converter 10, are inputted to a shift register 11, and are compressed to a data. Its output data is compared with a final processing data of a data register 12 by a coincidence detecting circuit 13, and a signal of a decision result is sent out to an output terminal 16. In this way, a code test of the ROM2 can be executed easily.
JP8181880A 1980-06-16 1980-06-16 Semiconductor device Pending JPS576491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8181880A JPS576491A (en) 1980-06-16 1980-06-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8181880A JPS576491A (en) 1980-06-16 1980-06-16 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS576491A true JPS576491A (en) 1982-01-13

Family

ID=13757066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8181880A Pending JPS576491A (en) 1980-06-16 1980-06-16 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS576491A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6318600A (en) * 1986-07-10 1988-01-26 Nec Corp Sweeping circuit for rom
JPS6353800A (en) * 1986-08-22 1988-03-08 Hitachi Ltd Semiconductor memory device
JPS63204170A (en) * 1987-02-18 1988-08-23 Nec Corp Semiconductor integrated circuit with testing mechanism
US5954830A (en) * 1997-04-08 1999-09-21 International Business Machines Corporation Method and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputs
US6209043B1 (en) 1998-05-26 2001-03-27 Mitsubishi Denki Kabushiki Kaisha Command-controllable IC memory with compatibility checking unit suspending memory operation/enabling data to be only read from memory when IC memory operation is host incompatible
US7184545B2 (en) 2000-05-31 2007-02-27 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit and method of testing semiconductor integrated circuit
US10362245B2 (en) 2013-02-01 2019-07-23 Hamamatsu Photonics K.K. Imaging device that performs rolling readout of pixel rows to acquire an image of an object

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6318600A (en) * 1986-07-10 1988-01-26 Nec Corp Sweeping circuit for rom
JPS6353800A (en) * 1986-08-22 1988-03-08 Hitachi Ltd Semiconductor memory device
JPS63204170A (en) * 1987-02-18 1988-08-23 Nec Corp Semiconductor integrated circuit with testing mechanism
US5954830A (en) * 1997-04-08 1999-09-21 International Business Machines Corporation Method and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputs
US6209043B1 (en) 1998-05-26 2001-03-27 Mitsubishi Denki Kabushiki Kaisha Command-controllable IC memory with compatibility checking unit suspending memory operation/enabling data to be only read from memory when IC memory operation is host incompatible
US7184545B2 (en) 2000-05-31 2007-02-27 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit and method of testing semiconductor integrated circuit
US10362245B2 (en) 2013-02-01 2019-07-23 Hamamatsu Photonics K.K. Imaging device that performs rolling readout of pixel rows to acquire an image of an object

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