JPS57115855A - Large scale semiconductor integrated circuit device - Google Patents

Large scale semiconductor integrated circuit device

Info

Publication number
JPS57115855A
JPS57115855A JP207281A JP207281A JPS57115855A JP S57115855 A JPS57115855 A JP S57115855A JP 207281 A JP207281 A JP 207281A JP 207281 A JP207281 A JP 207281A JP S57115855 A JPS57115855 A JP S57115855A
Authority
JP
Japan
Prior art keywords
signal
pins
data
output
multiplexer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP207281A
Other languages
Japanese (ja)
Inventor
Akira Mizuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP207281A priority Critical patent/JPS57115855A/en
Publication of JPS57115855A publication Critical patent/JPS57115855A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

Abstract

PURPOSE:To facilitate discrimination in functional description of an LSI by a method wherein data of the name of the function of the device is stored in the LSI device which uses semiconductor technology, and a device which outputs descriptive data as soon as a signal is given to an input pin is provided. CONSTITUTION:An LSI circuit device 1 is composed of a conventionally functioning logic section 2 and the newly added portion of a decoder 3, a section 4 storing the data of the function name and a multiplexer 5. Next a plurality of pins 6 for input signal and pins 8 for output signal are provided at the logic section 2, and, in addition, the pins 64 and 65 among pins 6 are connected to the decoder 3 through the input signal lines 10. Next this output is applied to the section 4 containing a descriptive data of function through a signal line 11, and this output is applied to the multiplexer 5 which is connected to the logic section 2 by the signal lines 15. By this constitution with a specified signal applied on the multiplexer 5 from a control input signal pin 7 through a signal line 13, the data of th function name is outputted at an output pin 9 through the signal line 14.
JP207281A 1981-01-12 1981-01-12 Large scale semiconductor integrated circuit device Pending JPS57115855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP207281A JPS57115855A (en) 1981-01-12 1981-01-12 Large scale semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP207281A JPS57115855A (en) 1981-01-12 1981-01-12 Large scale semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS57115855A true JPS57115855A (en) 1982-07-19

Family

ID=11519130

Family Applications (1)

Application Number Title Priority Date Filing Date
JP207281A Pending JPS57115855A (en) 1981-01-12 1981-01-12 Large scale semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS57115855A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583256A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Lsi chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583256A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Lsi chip

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