JPS5759348A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5759348A JPS5759348A JP13371180A JP13371180A JPS5759348A JP S5759348 A JPS5759348 A JP S5759348A JP 13371180 A JP13371180 A JP 13371180A JP 13371180 A JP13371180 A JP 13371180A JP S5759348 A JPS5759348 A JP S5759348A
- Authority
- JP
- Japan
- Prior art keywords
- film
- mask
- silicon
- polycrystal silicon
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To integrate a minute element to high density without lowering the characteristics of the element by combining an element separation method and a selective oxidation method. CONSTITUTION:An oxide silicon film 2, a polycrystal silicon film 3 and a silicon nitride film 4 are formed successively on a P type silicn substrate 1, a silicon nitride film 4' is shaped through etching while using a resist film 5 as a mask, ions are injected and an inversion preventive layer 6 is formed. An oxide film 7 is shaped on the surface of the polycrystal silicon 3 while employing the nitride film 4' as a mask. The nitride film 4' and the polycrystal silicon film 3 on an element forming region are removed through etching while using the oxide film 7 as a mask, the oxide film 2 is removed through etching while employing remaining polycrystal silicon 8 as a mask, and the element is formed on an exposed surface of the substrate. A clearance 9 can be adjusted by controlling the length of a bird beak generated when oxidizing the polycrystal silicon 3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13371180A JPS5759348A (en) | 1980-09-27 | 1980-09-27 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13371180A JPS5759348A (en) | 1980-09-27 | 1980-09-27 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5759348A true JPS5759348A (en) | 1982-04-09 |
Family
ID=15111101
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13371180A Pending JPS5759348A (en) | 1980-09-27 | 1980-09-27 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5759348A (en) |
-
1980
- 1980-09-27 JP JP13371180A patent/JPS5759348A/en active Pending
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