JPS5756943A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5756943A
JPS5756943A JP13248180A JP13248180A JPS5756943A JP S5756943 A JPS5756943 A JP S5756943A JP 13248180 A JP13248180 A JP 13248180A JP 13248180 A JP13248180 A JP 13248180A JP S5756943 A JPS5756943 A JP S5756943A
Authority
JP
Japan
Prior art keywords
substrate
film
layer
alpha
ray emission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13248180A
Other languages
Japanese (ja)
Inventor
Natsuo Tsubouchi
Shinichi Sato
Yoshikazu Obayashi
Masahiko Denda
Shigeji Kinoshita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13248180A priority Critical patent/JPS5756943A/en
Publication of JPS5756943A publication Critical patent/JPS5756943A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To prevent the erroneous operation of alpha-ray emission of an MOSLSI by epitaxially growing a high specific resistance layer of low impurity density on a low resistance Si substrate and electrically isolating the epitaxial layer with a selectively oxidized film reaching the low resistance substrate. CONSTITUTION:A P type epitaxial layer 2 having, for example, 10OMEGAcm is grown in 5mum on a P type substrate 1 having, for example, 0.05OMEGAcm. Then, with Si intrided film as a mask, a field oxidized film 3 is formed by a selective oxidation method. The film 3 is formed in the depth reaching the substrate 1, but when a high density region (channel stopping layer) 4 is formed between the film and the substrate 1, the film 3 may e reduced in thickness. Subsequently, an MOSFET or the like is formed in an ordinary step in the layer 2. In this manner, minority carrier generated in the substrate 1 by alpha-ray emission is mostly recombined in the substrate due to short diffusion length, thereby enabling to eliminate the influence to the element characteristics.
JP13248180A 1980-09-23 1980-09-23 Semiconductor device Pending JPS5756943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13248180A JPS5756943A (en) 1980-09-23 1980-09-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13248180A JPS5756943A (en) 1980-09-23 1980-09-23 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5756943A true JPS5756943A (en) 1982-04-05

Family

ID=15082376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13248180A Pending JPS5756943A (en) 1980-09-23 1980-09-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5756943A (en)

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