JPS5750448A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5750448A
JPS5750448A JP12689580A JP12689580A JPS5750448A JP S5750448 A JPS5750448 A JP S5750448A JP 12689580 A JP12689580 A JP 12689580A JP 12689580 A JP12689580 A JP 12689580A JP S5750448 A JPS5750448 A JP S5750448A
Authority
JP
Japan
Prior art keywords
wiring
width
hole
wirings
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12689580A
Other languages
Japanese (ja)
Inventor
Hitoshi Omichi
Yuichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP12689580A priority Critical patent/JPS5750448A/en
Publication of JPS5750448A publication Critical patent/JPS5750448A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To contrive the improvement in wiring pitch and the reduction in resistance, by a method wherein the wiring pitch is decided by the minimum interval between wirings and required wiring width and a concave section is provided at the part adjoining a through hole at gate array so that the minimum line width may be obtained within the allowable limit. CONSTITUTION:Wirings 11 and 12 are provided with a width of W2. With narrower width W2' established at the part adjoining a through hole covered by a mate wiring, the wiring will be provided with a concave section at the part next to the through hole. This method can decrease wiring resistance by reducing the wiring pitch.
JP12689580A 1980-09-12 1980-09-12 Semiconductor device Pending JPS5750448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12689580A JPS5750448A (en) 1980-09-12 1980-09-12 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12689580A JPS5750448A (en) 1980-09-12 1980-09-12 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5750448A true JPS5750448A (en) 1982-03-24

Family

ID=14946523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12689580A Pending JPS5750448A (en) 1980-09-12 1980-09-12 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5750448A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60147226U (en) * 1984-03-13 1985-09-30 ヤンマー農機株式会社 Reaping binding machine
JPH01123439A (en) * 1987-11-06 1989-05-16 Nec Corp Wiring structure for semiconductor integrated circuit device
US5208658A (en) * 1990-12-07 1993-05-04 Kawasaki Steel Corporation Semiconductor integrated circuit provided with contact for inter-layer connection and method of inter-layer connection therefor
WO2006095915A1 (en) * 2005-03-09 2006-09-14 Nec Corporation Multilayer wiring structure, semiconductor device, pattern transfer mask and method for manufacturing multilayer wiring structure

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60147226U (en) * 1984-03-13 1985-09-30 ヤンマー農機株式会社 Reaping binding machine
JPH01123439A (en) * 1987-11-06 1989-05-16 Nec Corp Wiring structure for semiconductor integrated circuit device
US5208658A (en) * 1990-12-07 1993-05-04 Kawasaki Steel Corporation Semiconductor integrated circuit provided with contact for inter-layer connection and method of inter-layer connection therefor
WO2006095915A1 (en) * 2005-03-09 2006-09-14 Nec Corporation Multilayer wiring structure, semiconductor device, pattern transfer mask and method for manufacturing multilayer wiring structure
JPWO2006095915A1 (en) * 2005-03-09 2008-08-21 日本電気株式会社 Multilayer wiring structure, semiconductor device, pattern transfer mask, and manufacturing method of multilayer wiring structure
US7999392B2 (en) 2005-03-09 2011-08-16 Renesas Electronics Corporation Multilayer wiring structure, semiconductor device, pattern transfer mask and method for manufacturing multilayer wiring structure

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