JPS5746367A - Recording and reproducing system of data signal - Google Patents
Recording and reproducing system of data signalInfo
- Publication number
- JPS5746367A JPS5746367A JP55123344A JP12334480A JPS5746367A JP S5746367 A JPS5746367 A JP S5746367A JP 55123344 A JP55123344 A JP 55123344A JP 12334480 A JP12334480 A JP 12334480A JP S5746367 A JPS5746367 A JP S5746367A
- Authority
- JP
- Japan
- Prior art keywords
- ram13
- supplied
- data signal
- port
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1803—Error detection or correction; Testing, e.g. of drop-outs by redundancy in data representation
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Electrically Operated Instructional Devices (AREA)
- Television Signal Processing For Recording (AREA)
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To obtain a data signal which is free from error, by recording continuously plural data signals containing the same data and the discrimination data of a code that can detect an error in the reproduction mode. CONSTITUTION:The pulse signals supplied from an I/O port are counted by a write address counter 14 which corresponds to a character generating storage device RAM13, and the contents of this count is supplied to a RAM13 via switching circuit SW15 in the form of a write address signal. At the same time, the character data signal supplied from the port 5 is supplied also to the RAM13 via a switching circuit 16. Both circuits SW15 and SW16 are controlled by the read/write control signal given from the port 5 and turned on in the writing mode. Accordingly the character data signal is written into the address designated by the counter 14 for the RAM13 in the writing mode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55123344A JPS5746367A (en) | 1980-09-05 | 1980-09-05 | Recording and reproducing system of data signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55123344A JPS5746367A (en) | 1980-09-05 | 1980-09-05 | Recording and reproducing system of data signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5746367A true JPS5746367A (en) | 1982-03-16 |
Family
ID=14858234
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55123344A Pending JPS5746367A (en) | 1980-09-05 | 1980-09-05 | Recording and reproducing system of data signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5746367A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61208676A (en) * | 1985-03-13 | 1986-09-17 | Ricoh Co Ltd | Data recording system |
-
1980
- 1980-09-05 JP JP55123344A patent/JPS5746367A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61208676A (en) * | 1985-03-13 | 1986-09-17 | Ricoh Co Ltd | Data recording system |
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