JPS5745726A - Transistor switch - Google Patents
Transistor switchInfo
- Publication number
- JPS5745726A JPS5745726A JP12084280A JP12084280A JPS5745726A JP S5745726 A JPS5745726 A JP S5745726A JP 12084280 A JP12084280 A JP 12084280A JP 12084280 A JP12084280 A JP 12084280A JP S5745726 A JPS5745726 A JP S5745726A
- Authority
- JP
- Japan
- Prior art keywords
- channel mos
- terminal
- trs
- conductive
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
Landscapes
- Electronic Switches (AREA)
Abstract
PURPOSE:To prevent the production of whisker pulses and to avoid malfunction of a succeeding circuit, by shifting the time of operation of a P channel MOS transistor (TR) constituting a transmission gate with an N channel MOS TR. CONSTITUTION:A control signal inputted to a terminal 11 is applied to a gate of an N channel MOS TR2 via an inverter IV13 and it is applied to the gate of a P channel MOS TR6 of a transmission gate TR G1 via an IV4. The threshold value VT2 of the IV 13 is set lower than the threshold value VT1 of the IV4. When the control signal level Vc<VT2, the TR2 is conductive and the TR6 is nonconductive, the TRS G1, 3 are in off-stage, and the input signal from a terminal 10 is not applied to an output terminal 12. When VT2<Vc<VT1, the TR2 and the TRs G1, 3 are in off-state and no signal output is obtained. When Vc>VT1, the TR2 keeps the off- state and the TRsG1, 3 are conductive and a signal is applied to the terminal 12. Since the TRs 2 and 6 are not conductive at the same time, the malfunction due to the production of whisker pulses for the succeeding circuit can not be caused.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12084280A JPS5745726A (en) | 1980-09-01 | 1980-09-01 | Transistor switch |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12084280A JPS5745726A (en) | 1980-09-01 | 1980-09-01 | Transistor switch |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5745726A true JPS5745726A (en) | 1982-03-15 |
JPH0113661B2 JPH0113661B2 (en) | 1989-03-07 |
Family
ID=14796303
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12084280A Granted JPS5745726A (en) | 1980-09-01 | 1980-09-01 | Transistor switch |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5745726A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4518873A (en) * | 1981-08-13 | 1985-05-21 | Fujitsu Limited | Buffer circuit for driving a C-MOS inverter |
-
1980
- 1980-09-01 JP JP12084280A patent/JPS5745726A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4518873A (en) * | 1981-08-13 | 1985-05-21 | Fujitsu Limited | Buffer circuit for driving a C-MOS inverter |
Also Published As
Publication number | Publication date |
---|---|
JPH0113661B2 (en) | 1989-03-07 |
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